Trait

spinal.core

ContextUser

Related Doc: package core

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trait ContextUser extends GlobalDataUser with ScalaLocated

Linear Supertypes
Known Subclasses
ALU, AhbLite3, AhbLite3Arbiter, AhbLite3Decoder, AhbLite3Master, AhbLite3OnChipRam, AhbLite3OnChipRom, AhbLite3SlaveFactory, AhbLite3ToApb3Bridge, AhbLite3ToApb3BridgePhase, Alu, AnalogDriverEnum, Apb3, Apb3Decoder, Apb3Gpio, Apb3I2cCtrl, Apb3Router, Apb3SlaveFactory, Apb3SpiMasterCtrl, Apb3SpiSlaveCtrl, Apb3SpiXdrMasterCtrl, Apb3UartCtrl, ApbCmd, Area, AssertStatement, AssignmentStatement, AsyncMemoryBus, AsyncMemoryBusFactory, AvalonMM, AvalonMMSlaveFactory, AvalonMMUartCtrl, AvalonMMVgaCtrl, AvalonReadDma, AvalonReadDmaCmd, Axi4, Axi4Ar, Axi4ArUnburstified, Axi4Arw, Axi4ArwUnburstified, Axi4Aw, Axi4AwUnburstified, Axi4Ax, Axi4AxUnburstified, Axi4B, Axi4R, Axi4ReadOnly, Axi4ReadOnlyArbiter, Axi4ReadOnlyDecoder, Axi4ReadOnlyErrorSlave, Axi4Shared, Axi4SharedArbiter, Axi4SharedDecoder, Axi4SharedErrorSlave, Axi4SharedOnChipRam, Axi4SharedSdramCtrl, Axi4SharedToApb3Bridge, Axi4SharedToBram, Axi4ToApb3BridgePhase, Axi4ToBRAMPhase, Axi4VgaCtrl, Axi4W, Axi4WriteOnly, Axi4WriteOnlyArbiter, Axi4WriteOnlyDecoder, Axi4WriteOnlyErrorSlave, AxiLite4, AxiLite4Ax, AxiLite4B, AxiLite4R, AxiLite4ReadOnly, AxiLite4SimpleReadDma, AxiLite4SimpleReadDmaCmd, AxiLite4SlaveFactory, AxiLite4W, AxiLite4WriteOnly, BR, BRAM, BRAMDecoder, BRAMSlaveFactory, BaseType, BinaryMultiplexerEnum, BitVector, Bits, BlackBox, BlackBoxULogic, BlinkingVgaCtrl, Block, Bool, BoolEdges, BranchPredictorLine, BufferCC, Bundle, BundleCase, BusSlaveFactory, BusSlaveFactoryAddressWrapper, BusSlaveFactoryDelayed, CSR, CastBitsToEnum, CastEnumToEnum, ClockEnableArea, ClockingArea, Cmd, Component, Config, CoreDataBus, CoreDataCmd, CoreDecodeOutput, CoreExecute0Output, CoreExecute1Output, CoreFetchOutput, CoreInstructionBus, CoreInstructionCmd, CoreInstructionRsp, CoreWriteBack0Output, Counter, CounterUpDown, Ctrl, CtrlCmd, Data, DataAssignmentStatement, DataCache, DataCacheCpuBus, DataCacheCpuCmd, DataCacheCpuCmdKind, DataCacheCpuRsp, DataCacheMemBus, DataCacheMemCmd, DataCacheMemRsp, DataWrapper, DebugExtensionBus, DebugExtensionCmd, DebugExtensionIo, DebugExtensionRsp, DeclarationStatement, DefaultAhbLite3Slave, EnumLiteral, EnumPoison, Equal, Floating, FloatingCompareResult, Flow, FlowCCByToggle, Fragment, FragmentToBitsStates, HVArea, I2c, I2cAddress, I2cIoFilter, I2cSlave, I2cSlaveBus, I2cSlaveCmd, I2cSlaveCmdMode, I2cSlaveConfig, I2cSlaveIo, I2cSlaveRsp, IMM, ImplicitArea, InferableEnumEncodingImpl, InitAssignmentStatement, InstructionCache, InstructionCacheCpuBus, InstructionCacheCpuCmd, InstructionCacheCpuRsp, InstructionCacheFlushBus, InstructionCacheMemBus, InstructionCacheMemCmd, InstructionCacheMemRsp, InstructionCtrl, InterruptCtrl, Jtag, JtagAvalonDebugger, JtagAxi4SharedDebugger, JtagBridge, JtagFsm, JtagInstruction, JtagInstructionFlowFragmentPush, JtagInstructionIdcode, JtagInstructionRead, JtagInstructionWrite, JtagInstructionWriteSimpleExample, JtagState, JtagTap, LeafStatement, LineInfo, LineInfo, M, MFS, MSK, MWR, Mem, Mem, MemCmd, MemPortStatement, MemReadAsync, MemReadPort, MemReadSync, MemReadWrite, MemWrite, MemWriteCmd, MemWritePayload, MixedDivider, MixedDividerCmd, MixedDividerRsp, Module, MultiData, MultiplexerEnum, Nameable, NameableByComponent, NoData, NotEqual, OP0, OP1, PC, PDMCore, PastEnum, Phase, Pinsec, PinsecTimerCtrl, PinsecTimerCtrlExternal, PipelinedMemoryBus, PipelinedMemoryBusArbiter, PipelinedMemoryBusCmd, PipelinedMemoryBusDecoder, PipelinedMemoryBusRsp, PipelinedMemoryBusSlaveFactory, PipelinedMemoryBusToApbBridge, PlicGateway, PlicGatewayActiveHigh, PlicTarget, Prescaler, PulseCCByToggle, Ram_1w_1ra, Ram_1w_1rs, Ram_1wors, Ram_1wrs, Ram_2c_1w_1rs, Ram_2wrs, ReadRetLinked, ReadableOpenDrain, RecFloating, Request, ResetArea, Response, Rgb, RiscvAhbLite3, RiscvAvalon, RiscvAxi4, RiscvCore, Rsp, SB_PLL40_CORE, SB_PLL40_PAD, SFix, SFix2D, SInt, SblCmd, SblReadCmd, SblReadDma, SblReadDmaCmd, SblReadRet, SblWriteCmd, SdramCtrl, SdramCtrlAxi4SharedContext, SdramCtrlBackendCmd, SdramCtrlBackendTask, SdramCtrlBank, SdramCtrlBus, SdramCtrlCmd, SdramCtrlFrontendState, SdramCtrlRsp, SdramInterface, SerialCheckerPhysical, SerialCheckerPhysicalToSerial, SerialCheckerPhysicalfromSerial, SerialCheckerRx, SerialCheckerRxState, SerialCheckerTx, SerialCheckerTxState, SerialLinkRx, SerialLinkRxState, SerialLinkRxToTx, SerialLinkTx, SerialLinkTxState, SerialSafeLayerRxState, SerialSafeLayerTx, SerialSafelLayerRx, SignedDivider, SignedDividerCmd, SignedDividerRsp, SimpleJtagTap, Sio, SlowArea, SpiKind, SpiMaster, SpiMasterCmd, SpiMasterCtrl, SpiMasterCtrlCmdData, SpiMasterCtrlCmdMode, SpiMasterCtrlCmdSs, SpiMasterCtrlConfig, SpiSlave, SpiSlaveCtrl, SpiSlaveCtrlIo, SpiXdrMaster, SpinalEnum, SpinalEnumCraft, SpinalEnumElement, SpinalEnumEncoding, State, StateBoot, StateDelay, StateFsm, StateMachine, StateMachineEnum, StateParallelFsm, Statement, StatementDoubleLinkedContainer, StatementDoubleLinkedContainerElement, Stream, StreamArbiter, StreamCCByToggle, StreamDemux, StreamDispatcherSequencial, StreamFifo, StreamFifoCC, StreamFifoLowLatency, StreamFlowArbiter, StreamFork, StreamFragmentBitsDispatcher, StreamToStreamFragmentBits, SwitchStatement, SwitchStatementElement, SystemDebugger, SystemDebuggerMemBus, SystemDebuggerMemCmd, SystemDebuggerRemoteBus, SystemDebuggerRsp, Timeout, Timer, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TreeStatement, TriState, TriStateArray, TriStateOutput, UFix, UFix2D, UInt, UInt2D, Uart, UartCtrl, UartCtrlConfig, UartCtrlFrameConfig, UartCtrlIo, UartCtrlRx, UartCtrlRxState, UartCtrlTx, UartCtrlTxState, UartCtrlUsageExample, UartParityType, UartStopType, UnsignedDivider, UnsignedDividerCmd, UnsignedDividerRsp, Vec, Vga, VgaCtrl, VgaTimings, VgaTimingsHV, VideoDma, VideoDmaMem, WB, WhenStatement, Wishbone, WishboneAdapter, WishboneArbiter, WishboneDecoder, WishboneGpio, WishboneSlaveFactory, WishboneSpiMasterCtrl, WishboneSpiSlaveCtrl, WishboneUartCtrl, Wrapper, XFix, XdrOutput, XdrPin, XipBus, alt_inbuf, alt_inbuf_diff, alt_outbuf, alt_outbuf_diff, alt_outbuf_tri, alt_outbuf_tri_diff, binaryOneHot, binarySequential, inferred, native
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Inherited
  1. ContextUser
  2. ScalaLocated
  3. GlobalDataUser
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Visibility
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Value Members

  1. final def !=(arg0: Any): Boolean

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  2. final def ##(): Int

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  3. final def ==(arg0: Any): Boolean

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  4. final def asInstanceOf[T0]: T0

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  5. def clone(): AnyRef

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  6. def component: Component

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  7. final def eq(arg0: AnyRef): Boolean

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  8. def equals(arg0: Any): Boolean

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  9. def finalize(): Unit

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    @throws( classOf[java.lang.Throwable] )
  10. final def getClass(): Class[_]

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  11. def getInstanceCounter: Int

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  12. def getScalaLocationLong: String

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    Definition Classes
    ScalaLocated
  13. def getScalaLocationShort: String

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    Definition Classes
    ScalaLocated
  14. def getScalaTrace(): Throwable

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    Definition Classes
    ScalaLocated
  15. val globalData: GlobalData

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    Definition Classes
    GlobalDataUser
  16. def hashCode(): Int

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  17. final def isInstanceOf[T0]: Boolean

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  18. final def ne(arg0: AnyRef): Boolean

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  19. final def notify(): Unit

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  20. final def notifyAll(): Unit

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  21. var parentScope: ScopeStatement

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  22. def setScalaLocated(source: ScalaLocated): ContextUser.this.type

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    ScalaLocated
  23. final def synchronized[T0](arg0: ⇒ T0): T0

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  24. def toString(): String

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  25. final def wait(): Unit

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    @throws( ... )
  26. final def wait(arg0: Long, arg1: Int): Unit

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  27. final def wait(arg0: Long): Unit

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Inherited from ScalaLocated

Inherited from GlobalDataUser

Inherited from AnyRef

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