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object ICE40_PLL

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  1. def makePLL(reqFreq: HertzNumber, tolerance: Double = 0.02, sourceCd: ClockDomain = ClockDomain.current, usePad: Boolean = false): ClockDomain

    Calculate & instantiate PLL and return ClockDomain

    Calculate & instantiate PLL and return ClockDomain

    If the source clock domain uses a synchronous reset, a reset bridge will be instantiated to forward the reset to the resulting CD.

    reqFreq

    The frequency the new ClockDomain should run at

    tolerance

    Allowed mismatch of ClockDomain freq to reqFreq (as a factor)

    sourceCd

    ClockDomain to use as clock/reset source, defaults to current CD

    usePad

    if true a SB_PLL40_PAD will be used, otherwise a SB_PLL40_CORE

    new ClockingArea(ICE40_PLL.makePLL(96 MHz)) {
  // your code running at 96MHz
}