object CSR
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- val DCSR: Int
- val DPC: Int
- val FCSR: Int
- val FFLAGS: Int
- val FRM: Int
- def MARCHID: Int
- def MBASE: Int
- def MBOUND: Int
- def MCAUSE: Int
- val MCAUSE_ENUM: AnyRef { ... /* 16 definitions in type refinement */ }
- val MCOUNTEREN: Int
- val MCOUNTINHIBIT: Int
- def MCYCLE: Int
- def MCYCLEH: Int
- def MDBASE: Int
- def MDBOUND: Int
- def MEDELEG: Int
- def MEPC: Int
- def MHARTID: Int
- def MHPMCOUNTER0: Int
- def MHPMCOUNTER0H: Int
- def MHPMCOUNTER3: Int
- def MHPMCOUNTER3H: Int
- def MHPMEVENT0: Int
- def MHPMEVENT0H: Int
- def MHPMEVENT3: Int
- def MIBASE: Int
- def MIBOUND: Int
- def MIDELEG: Int
- def MIE: Int
- def MIMPID: Int
- def MINSTRET: Int
- def MINSTRETH: Int
- def MIP: Int
- def MISA: Int
- def MSCRATCH: Int
- def MSTATUS: Int
- def MTVAL: Int
- def MTVEC: Int
- def MVENDORID: Int
- val PMPADDR: Int
- val PMPCFG: Int
- val SATP: Int
- val SCAUSE: Int
- val SCOUNTEREN: Int
- val SCOUNTOVF: Int
- val SEPC: Int
- val SIE: Int
- val SIP: Int
- val SSCRATCH: Int
- val SSTATUS: Int
- val STVAL: Int
- val STVEC: Int
- val TCONTROL: Int
- val TDATA1: Int
- val TDATA2: Int
- val TINFO: Int
- val TSELECT: Int
- val UCAUSE: Int
- def UCYCLE: Int
- def UCYCLEH: Int
- val UEPC: Int
- def UHPMCOUNTER0: Int
- def UHPMCOUNTER0H: Int
- def UHPMCOUNTER3: Int
- def UHPMCOUNTER3H: Int
- val UIE: Int
- def UINSTRET: Int
- def UINSTRETH: Int
- val UIP: Int
- val USCRATCH: Int
- val USTATUS: Int
- def UTIME: Int
- def UTIMEH: Int
- val UTVAL: Int
- val UTVEC: Int
- val VCSR: Int
- val VSTART: Int
- val VXRM: Int
- val VXSAT: Int
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