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Sometimes, creating a Component to define some logic is overkill because you:

  • Need to define all construction parameters and IO (verbosity, duplication)

  • Split your code (more than needed)

For this kind of case you can use an Area to define a group of signals/logic:

class UartCtrl extends Component {
  val timer = new Area {
    val counter = Reg(UInt(8 bit))
    val tick = counter === 0
    counter := counter - 1
    when(tick) {
      counter := 100

  val tickCounter = new Area {
    val value = Reg(UInt(3 bit))
    val reset = False
    when(timer.tick) {          // Refer to the tick from timer area
      value := value + 1
    when(reset) {
      value := 0

  val stateMachine = new Area {


In VHDL and Verilog, sometimes prefixes are used to separate variables into logical sections. It is suggested that you use Area instead of this in SpinalHDL.


ClockingArea is a special kind of Area that allows you to define chunks of hardware which use a given ClockDomain