package sim

Simulation package

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Type Members

  1. class CoreSimManager extends SimManager
  2. abstract class RandomizableBitVector extends AnyRef
    Attributes
    protected
  3. implicit class SimAFixPimper extends AnyRef
  4. implicit class SimArrayBufferPimper[T] extends AnyRef
  5. implicit class SimBaseTypePimper extends AnyRef

    Add implicit function to BaseType for simulation

  6. implicit class SimBigIntPimper extends AnyRef

    Add implicit function to BigInt

  7. implicit class SimBitVectorPimper extends AnyRef

    Add implicit function to BitVector

  8. implicit class SimBitsPimper extends RandomizableBitVector

    Add implicit function to Bits

  9. implicit class SimBoolPimper extends SimEquiv

    Add implicit function to Bool

  10. implicit class SimClockDomainHandlePimper extends SimClockDomainPimper
  11. implicit class SimClockDomainPimper extends AnyRef

    Add implicit function to ClockDomain

  12. abstract class SimCompiled[T <: Component] extends AnyRef

    Run simulation

  13. case class SimConfigLegacy[T <: Component](_rtlGen: Option[() ⇒ T] = None, _spinalConfig: SpinalConfig = SpinalConfig(), _spinalReport: Option[SpinalReport[T]] = None) extends Product with Serializable

    Legacy simulation configuration

  14. implicit class SimDataPimper[T <: Data] extends AnyRef

    Add implicit function to Data

  15. implicit class SimEnumPimper[T <: SpinalEnum] extends SimEquiv

    Add implicit function to Enum

  16. trait SimEquiv extends AnyRef

    Represents the relationship where a SpinalHDL type can be converted to a certain Scala type during simulation and vice-versa.

  17. implicit class SimEquivBitVectorBigIntPimper extends SimEquiv
  18. implicit class SimEquivBitVectorBooleansPimper extends SimEquiv
  19. implicit class SimEquivBitVectorBytesPimper extends SimEquiv
  20. implicit class SimEquivBitVectorLongPimper extends SimEquiv
  21. implicit class SimEquivVecSeqPimper[T <: Data, E] extends SimEquiv
  22. abstract class SimFix[T <: XFix[_, _]] extends AnyRef

    Add implicit function to UFix/SFix/AFix

  23. implicit class SimMemPimper[T <: Data] extends AnyRef
  24. case class SimMutex(randomized: Boolean = false) extends Product with Serializable
  25. implicit class SimSFixPimper extends SimFix[SFix]
  26. implicit class SimSIntPimper extends RandomizableBitVector

    Add implicit function to SInt

  27. implicit class SimSeqPimper[T] extends AnyRef
  28. implicit class SimUFixPimper extends SimFix[UFix]
  29. implicit class SimUIntPimper extends RandomizableBitVector

    Add implicit function to UInt

  30. implicit class SimUnionElementPimper[T <: Data] extends AnyRef
  31. class SimVerilatorPhase extends PhaseNetlist
  32. implicit class SimpComponentPimper[T <: Component] extends AnyRef
  33. case class SpinalGhdlBackendConfig[T <: Component](rtl: SpinalReport[T], waveFormat: WaveFormat = WaveFormat.NONE, workspacePath: String = "./", workspaceName: String = null, wavePath: String = null, wavePrefix: String = null, waveDepth: Int = 0, optimisationLevel: Int = 2, simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), runFlags: ArrayBuffer[String] = ArrayBuffer[String](), usePluginsCache: Boolean = true, pluginsCachePath: String = "./simWorkspace/.pluginsCachePath", enableLogging: Boolean = false, timePrecision: TimeNumber = null, ghdlFlags: GhdlFlags = GhdlFlags(), testPath: String = null) extends SpinalVpiBackendConfig[T] with Product with Serializable
  34. case class SpinalIVerilogBackendConfig[T <: Component](rtl: SpinalReport[T], waveFormat: WaveFormat = WaveFormat.NONE, workspacePath: String = "./", workspaceName: String = null, wavePath: String = null, wavePrefix: String = null, waveDepth: Int = 0, optimisationLevel: Int = 2, simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), runFlags: ArrayBuffer[String] = ArrayBuffer[String](), usePluginsCache: Boolean = true, pluginsCachePath: String = "./simWorkspace/.pluginsCachePath", enableLogging: Boolean = false, timePrecision: TimeNumber = null, testPath: String = null) extends SpinalVpiBackendConfig[T] with Product with Serializable
  35. class SpinalSimBackendSel extends AnyRef
  36. case class SpinalSimConfig(_workspacePath: String = ..., _workspaceName: String = null, _waveDepth: Int = 0, _spinalConfig: SpinalConfig = SpinalConfig(), _optimisationLevel: Int = 0, _simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), _runFlags: ArrayBuffer[String] = ArrayBuffer[String](), _additionalRtlPath: ArrayBuffer[String] = ArrayBuffer[String](), _additionalIncludeDir: ArrayBuffer[String] = ArrayBuffer[String](), _waveFormat: WaveFormat = WaveFormat.NONE, _backend: SpinalSimBackendSel = SpinalSimBackendSel.VERILATOR, _withCoverage: Boolean = false, _maxCacheEntries: Int = 100, _cachePath: String = null, _disableCache: Boolean = false, _withLogging: Boolean = false, _vcsCC: Option[String] = None, _vcsLd: Option[String] = None, _vcsUserFlags: VCSFlags = VCSFlags(), _vcsSimSetupFile: String = null, _vcsEnvSetup: () ⇒ Unit = null, _xciSourcesPaths: ArrayBuffer[String] = ArrayBuffer[String](), _bdSourcesPaths: ArrayBuffer[String] = ArrayBuffer[String](), _xilinxDevice: String = "xc7vx485tffg1157-1", _simScript: String = null, _timePrecision: TimeNumber = null, _timeScale: TimeNumber = null, _testPath: String = "$WORKSPACE/$COMPILED/$TEST", _waveFilePrefix: String = null, _ghdlFlags: GhdlFlags = GhdlFlags()) extends Product with Serializable

    SpinalSim configuration

  37. case class SpinalVCSBackendConfig[T <: Component](rtl: SpinalReport[T], waveFormat: WaveFormat = WaveFormat.NONE, workspacePath: String = "./", workspaceName: String = null, wavePath: String = null, wavePrefix: String = null, waveDepth: Int = 0, optimisationLevel: Int = 2, simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), runFlags: ArrayBuffer[String] = ArrayBuffer[String](), usePluginsCache: Boolean = true, pluginsCachePath: String = "./simWorkspace/.pluginsCachePath", enableLogging: Boolean = false, timePrecision: TimeNumber = null, simSetupFile: String = null, envSetup: () ⇒ Unit = null, vcsFlags: VCSFlags = null, compileFlags: ArrayBuffer[String] = ArrayBuffer[String](), elaborateFlags: ArrayBuffer[String] = ArrayBuffer[String](), vcsCC: Option[String] = None, vcsLd: Option[String] = None, testPath: String = null) extends SpinalVpiBackendConfig[T] with Product with Serializable
  38. case class SpinalVerilatorBackendConfig[T <: Component](rtl: SpinalReport[T], waveFormat: WaveFormat = WaveFormat.NONE, maxCacheEntries: Int = 100, cachePath: String = null, workspacePath: String = "./", workspaceName: String = null, vcdPath: String = null, vcdPrefix: String = null, waveDepth: Int = 0, optimisationLevel: Int = 2, simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), withCoverage: Boolean, timePrecision: TimeNumber = null, testPath: String) extends Product with Serializable
  39. class SpinalVpiBackendConfig[T <: Component] extends AnyRef
  40. case class SpinalXSimBackendConfig[T <: Component](rtl: SpinalReport[T], xciSourcesPaths: ArrayBuffer[String] = ArrayBuffer[String](), bdSourcesPaths: ArrayBuffer[String] = ArrayBuffer[String](), waveFormat: WaveFormat, workspacePath: String, workspaceName: String, wavePath: String, xilinxDevice: String, simScript: String, simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), timePrecision: TimeNumber = null) extends Product with Serializable
  41. class SwapTagPhase extends PhaseNetlist

    Swap all oldTag with newTag

Value Members

  1. def SimConfig: SpinalSimConfig
  2. def addInputsAssignmentWatch(mod: Module): Unit
  3. def addWatchedSignals(signals: Seq[BaseType]): Unit
  4. def checkInputsAssignmentAfterReset(cd: ClockDomain, stopOnFail: Boolean = false): Unit
  5. def checkWatchedSignalAssigned(): Seq[String]
  6. def currentTestName(): String
  7. def currentTestPath(): String
  8. def delayed(delay: TimeNumber)(body: ⇒ Unit): Unit
  9. def delayed(delay: Long)(body: ⇒ Unit): Unit
  10. def disableSimWave(): Unit
  11. def enableSimWave(): Unit
  12. def fork(body: ⇒ Unit): SimThread

    Fork

  13. def forkJoin(bodys: () ⇒ Unit*): Unit
  14. def forkSensitive(trigger: ⇒ Any)(block: ⇒ Unit): Unit
  15. def forkSensitive(triggers: Data)(block: ⇒ Unit): Unit
  16. def forkSensitive(block: ⇒ Unit): Unit
  17. def forkSensitive2(triggers: Data*)(block: ⇒ Unit): Unit
  18. def forkSensitiveWhile(block: ⇒ Boolean): Unit
  19. def forkSimSporadicWave(captures: Seq[(Double, Double)], enableTime: Double = 1e-7, disableTime: Double = 1e-4, timeUnit: Double = 1e12): Unit
  20. def getBigInt[T <: Data](mem: Mem[T], address: Long): BigInt
  21. def getForbiddenRandom(): AtomicLong
  22. def hzToLong(hz: HertzNumber): Long
  23. def killRandom(): Unit
  24. def onSimEnd(body: ⇒ Unit): Unit
  25. def periodicaly(delay: Long)(body: ⇒ Unit): Unit
  26. def setBigInt(bt: BaseType, value: BigInt): Unit

    Set a BigInt value to a BaseType

  27. def setBigInt[T <: Data](mem: Mem[T], address: Long, data: BigInt): Unit
  28. def setLong(bt: BaseType, value: Long): Unit

    Set a long value to a BaseType

  29. def simCompiled: SimCompiled[_ <: Component]
  30. def simDeltaCycle(): Long
  31. def simFailure(message: String = ""): Nothing
  32. def simRandom(implicit simManager: SimManager = sm): Random
  33. def simSuccess(): Nothing

    Success/Failure simulation

  34. def simThread: SimThread
  35. def simTime(): Long

    Return the current simulation time

  36. def sleep(time: TimeNumber): Unit
  37. def sleep(cycles: Double): Unit
  38. def sleep(cycles: Long): Unit

    Sleep / WaitUntil

  39. def sm: SimManager
  40. def timePrecision: BigDecimal
  41. def timeToLong(time: TimeNumber): Long
  42. def waitUntil(cond: ⇒ Boolean): Unit
  43. object DoClock

    Generate a clock

  44. object DoReset

    Execute a reset sequence

  45. object ForkClock

    Fork the DoClock

  46. object SimPublic extends SpinalTag

    Tag SimPublic

  47. object SimSpeedPrinter

    Print the simulation speed

  48. object SimStatics
  49. object SimTimeout

    Create a Timeout for the simulation

  50. object SimUnionElementPimper
  51. object SimWorkspace

    Simulation Workspace

  52. object SpinalGhdlBackend
  53. object SpinalIVerilogBackend
  54. object SpinalSimBackendSel
  55. object SpinalVCSBackend
  56. object SpinalVerilatorBackend
  57. object SpinalVerilatorSim
  58. object SpinalVpiBackend
  59. object SpinalXSimBackend
  60. object TracingOff extends SpinalTag

Deprecated Value Members

  1. def SimConfig[T <: Component](rtl: SpinalReport[T]): SimConfigLegacy[T]
    Annotations
    @deprecated
    Deprecated

    (Since version ???) Use SimConfig.???.compile(new Dut) instead

  2. def SimConfig[T <: Component](rtl: ⇒ T): SimConfigLegacy[T]
    Annotations
    @deprecated
    Deprecated

    (Since version ???) Use SimConfig.???.compile(new Dut) instead

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