t

vexiiriscv.regfile

RegfileService

trait RegfileService extends AnyRef

Provide an API which allows to create new read/write ports to a given register file.

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Abstract Value Members

  1. abstract def getPhysicalDepth: Int
  2. abstract def getWrites(): Seq[RegFileWrite]
  3. abstract def newRead(withReady: Boolean): RegFileRead
  4. abstract def newWrite(withReady: Boolean, sharingKey: Any = null, priority: Int = 0): RegFileWrite
  5. abstract def readLatency: Int
  6. abstract def rfSpec: RegfileSpec
  7. abstract def writeLatency: Int

Concrete Value Members

  1. val elaborationLock: Retainer