trait FsmHal extends AnyRef

Here are a set of classes which are used to build directed VexiiRiscv test cases. For instance, to test if VexiiRiscv can boot linux in a simulation, they can be used to encode the expected sequence of terminal stdout/stdin to observe/produce until the sim can be considered a success.

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  1. abstract def next(): Unit
  2. abstract def putc(value: String): Unit