case class WishboneInterconFactory() extends Product with Serializable
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Instance Constructors
- new WishboneInterconFactory()
Type Members
- case class ConnectionModel(m: Wishbone, s: Wishbone, connector: (Wishbone, Wishbone) ⇒ Unit = WishboneConnectors.direct) extends Product with Serializable
- case class MasterModel(connector: (Wishbone, Wishbone) ⇒ Unit = WishboneConnectors.direct) extends Product with Serializable
- case class SlaveModel(mapping: AddressMapping, connector: (Wishbone, Wishbone) ⇒ Unit = WishboneConnectors.direct, transactionLock: Boolean = true) extends Product with Serializable
Value Members
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def
addMaster(bus: Wishbone, accesses: Seq[Wishbone]): WishboneInterconFactory.this.type
Queue a master to be connected
Queue a master to be connected
- bus
a master wishbone device
- accesses
a list of slaves device to connect the master with
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def
addMasters(specs: (Wishbone, Seq[Wishbone])*): WishboneInterconFactory.this.type
Queue a master to be connected
Queue a master to be connected
- specs
a tuple of master wishbone device and a list of slaves device to connect the master with
interconnect.addMasters( dBus -> List(ram.io.buses(0), slowBus), iBus -> List(ram.io.buses(1), slowBus), slowBus-> List(peripherals.io.bus, flashXip.io.bus) )
Example: -
def
addSlave(bus: Wishbone, mapping: AddressMapping): WishboneInterconFactory.this.type
add a slave to the intercon, and specify its address space
add a slave to the intercon, and specify its address space
- bus
the slave device
- mapping
the address defined via spinal.lib.bus.misc.AddressMapping
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def
addSlaves(orders: (Wishbone, AddressMapping)*): WishboneInterconFactory.this.type
add multiple slave to the intercon, and specify their address space
add multiple slave to the intercon, and specify their address space
interconnect.addSlaves( ram.io.buses(0) -> SizeMapping(0x00000, 64 KiB), ram.io.buses(1) -> SizeMapping(0x00000, 64 KiB), peripherals.io.bus -> SizeMapping(0x70000, 64 Byte), flashXip.io.bus -> SizeMapping(0x80000, 512 KiB), slowBus -> DefaultMapping )
Example: -
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- @throws( ... ) @native() @IntrinsicCandidate()
- val connections: ArrayBuffer[ConnectionModel]
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- val masters: LinkedHashMap[Wishbone, MasterModel]
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notifyAll(): Unit
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def
setConnector(m: Wishbone, s: Wishbone)(connector: (Wishbone, Wishbone) ⇒ Unit): Unit
Modify a connection
Modify a connection
- m
the master where the conenction start
- s
the slave that is connected to the master
interconnect.setConnector(dBus, slowBus){(m,s) => m.cmd.halfPipe() >> s.cmd m.rsp << s.rsp }
Example: -
def
setConnector(bus: Wishbone)(connector: (Wishbone, Wishbone) ⇒ Unit): Unit
Modify a connection
Modify a connection
- bus
the bus
- val slaves: LinkedHashMap[Wishbone, SlaveModel]
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