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c

spinal.lib.com.swd.sim

SwdHostDriver

class SwdHostDriver extends AnyRef

SWD host (probe) model for simulation.

The bench owns SWCLK (the DUT clock) and reproduces OpenOCD's bitbang model: the host sets SWDIO while SWCLK is low and samples target data while low; the target acts on rising edges. All values are sent/collected LSB first. Protocol assertions (turnaround positions, no-drive during requests, read parity, WAIT/FAULT data-phase skip) are embedded in the transaction helpers.

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Instance Constructors

  1. new SwdHostDriver(cd: ClockDomain, swdio: TriState[Bool])

    Drive the target side of an SWDIO TriState (read = host -> target).

  2. new SwdHostDriver(cd: ClockDomain, swdioI: Bool, swdioO: Bool, swdioOe: Bool)

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  1. final def !=(arg0: Any): Boolean
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  10. def header(apNdp: Boolean, rnw: Boolean, addr: Int, flipParity: Boolean = false, badStop: Boolean = false, badPark: Boolean = false): Unit

    8-bit packet request, LSB first.

    8-bit packet request, LSB first. The target must not drive during it.

  11. def idle(n: Int): Unit
  12. final def isInstanceOf[T0]: Boolean
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  13. def lineReset(): Unit
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  16. final def notifyAll(): Unit
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  17. def ones(n: Int): Unit
  18. def readAck(): (Int, Boolean)
  19. def readTargetBit(): (Boolean, Boolean)
  20. def step(bit: Boolean): (Boolean, Boolean)

    One SWCLK cycle.

    One SWCLK cycle. Host drives bit; returns (targetData, targetOe) as the host would sample them during the low phase (i.e. what the target registered on the previous rising edge).

  21. final def synchronized[T0](arg0: ⇒ T0): T0
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  22. def toString(): String
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  23. def transactRead(apNdp: Boolean, addr: Int): (Int, Option[BigInt])
  24. def transactWrite(apNdp: Boolean, addr: Int, data: BigInt, flipDataParity: Boolean = false): Int
  25. final def wait(arg0: Long, arg1: Int): Unit
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  27. final def wait(): Unit
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