Packages

package sim

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Type Members

  1. class SwdHostDriver extends AnyRef

    SWD host (probe) model for simulation.

    SWD host (probe) model for simulation.

    The bench owns SWCLK (the DUT clock) and reproduces OpenOCD's bitbang model: the host sets SWDIO while SWCLK is low and samples target data while low; the target acts on rising edges. All values are sent/collected LSB first. Protocol assertions (turnaround positions, no-drive during requests, read parity, WAIT/FAULT data-phase skip) are embedded in the transaction helpers.

Value Members

  1. object SwdAckSim

    ACK codes as read LSB-first off the wire (= the ADI register values).

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