NaxRiscv
  • Introduction
    • NaxRiscv
      • Project development and status
      • Why a OoO core targeting FPGA
      • Additional resources
    • Pipeline
    • How to use
    • Hardware description
  • Frontend
    • Decoder
    • Physical register allocation
    • Architectural to physical
    • Physical to ROB ID
    • Dispatch / Issue
  • Execution units
    • Custom instruction
      • SIMD add
        • Plugin implementation
        • NaxRiscv generation
        • Software test
        • Simulation
        • Conclusion
        • Hardcore way
  • Memory system
    • Load store unite
    • MMU
  • Branch prediction
    • Fetch prediction
    • Decode prediction
    • Jump/branch circular buffer
  • Backend
    • Commit
    • Register file
  • Simulation
    • Introduction
    • Spike
  • Performance and Area
    • RV32
    • RV64
    • Notes
    • How to run the benchmark
  • Abstractions / HDL
    • Framework
      • Plugin tasks
      • Service definition
      • Service implementation
      • Service usage
      • Service Pipeline definition
      • Service Pipeline usage
      • Execution units
      • ShiftPlugin
    • Pipeline
    • State machine API
    • Automated multiport memory transformation
  • Misc
    • Jtag / OpenOCD / GDB
    • Security
      • Side channel attack
        • How to reproduce
  • Hardware
    • Litex
      • Digilent nexys video
      • Putting debian on the SDCARD
NaxRiscv
  • »
  • <no title>
  • View page source

  • Introduction
    • NaxRiscv
    • Pipeline
    • How to use
    • Hardware description
  • Frontend
    • Decoder
    • Physical register allocation
    • Architectural to physical
    • Physical to ROB ID
    • Dispatch / Issue
  • Execution units
    • Custom instruction
  • Memory system
    • Load store unite
    • MMU
  • Branch prediction
    • Fetch prediction
    • Decode prediction
    • Jump/branch circular buffer
  • Backend
    • Commit
    • Register file
  • Simulation
    • Introduction
    • Spike
  • Performance and Area
    • RV32
    • RV64
    • Notes
    • How to run the benchmark
  • Abstractions / HDL
    • Framework
    • Pipeline
    • State machine API
    • Automated multiport memory transformation
  • Misc
    • Jtag / OpenOCD / GDB
    • Security
  • Hardware
    • Litex
Next

© Copyright 2022, Spaghetti god.

Built with Sphinx using a theme provided by Read the Docs.