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All examples assume that you have the following imports on the top of your scala file:

import spinal.core._
import spinal.lib._

To generate VHDL for a given component, you can place the following at the bottom of your scala file:

object MyMainObject {
  def main(args: Array[String]) {
    SpinalVhdl(new TheComponentThatIWantToGenerate(constructionArguments))   //Or SpinalVerilog