Type Members

1.  case class Axi4(config: Axi4Config) extends Bundle with IMasterSlave with Axi4Bus with Product with Serializable

   Axi4 interface definition

   Axi4 interface definition

   config

   Axi4 configuration class

2.  class Axi4Ar extends Axi4Ax
3.  class Axi4ArUnburstified extends Axi4AxUnburstified
4.  class Axi4Arw extends Axi4Ax
5.  class Axi4ArwUnburstified extends Axi4AxUnburstified
6.  class Axi4Aw extends Axi4Ax
7.  class Axi4AwUnburstified extends Axi4AxUnburstified
8.  class Axi4Ax extends Bundle

   Definition of the Write/Read address channel

9.  class Axi4AxUnburstified extends Bundle
10.  case class Axi4B(config: Axi4Config) extends Bundle with Product with Serializable

    Definition of the Write response channel

    Definition of the Write response channel

    config

    Axi4 configuration class

11.  trait Axi4Bus extends AnyRef
12.  case class Axi4CC(axiConfig: Axi4Config, inputCd: ClockDomain, outputCd: ClockDomain, arFifoSize: Int, awFifoSize: Int, rFifoSize: Int, wFifoSize: Int, bFifoSize: Int) extends Component with Product with Serializable
13.  case class Axi4Config(addressWidth: Int, dataWidth: Int, idWidth: Int = -1, useId: Boolean = true, withAxi3: Boolean = false, useRegion: Boolean = true, useBurst: Boolean = true, useLock: Boolean = true, useCache: Boolean = true, useSize: Boolean = true, useQos: Boolean = true, useLen: Boolean = true, useLast: Boolean = true, useResp: Boolean = true, useProt: Boolean = true, useStrb: Boolean = true, useAllStrb: Boolean = false, arUserWidth: Int = -1, awUserWidth: Int = -1, rUserWidth: Int = -1, wUserWidth: Int = -1, bUserWidth: Int = -1, readIssuingCapability: Int = -1, writeIssuingCapability: Int = -1, combinedIssuingCapability: Int = -1, readDataReorderingDepth: Int = -1) extends Product with Serializable

    Configuration class for the Axi4 bus

14.  case class Axi4CrossbarFactory() extends Product with Serializable
15.  case class Axi4CrossbarSlaveConfig(mapping: SizeMapping) extends Product with Serializable
16.  case class Axi4CrossbarSlaveConnection(master: Axi4Bus) extends Product with Serializable
17.  case class Axi4Downsizer(inputConfig: Axi4Config, outputConfig: Axi4Config) extends Component with Product with Serializable
18.  class Axi4DownsizerSubTransactionGenerator[T <: Axi4Ax] extends Component
19.  class Axi4IdRemover extends Component
20.  case class Axi4R(config: Axi4Config) extends Bundle with Product with Serializable

    Definition of the Read Data channel

    Definition of the Read Data channel

    config

    Axi4 configuration class

21.  case class Axi4ReadOnly(config: Axi4Config) extends Bundle with IMasterSlave with Axi4Bus with Product with Serializable
22.  class Axi4ReadOnlyAligner extends Component
23.  case class Axi4ReadOnlyArbiter(outputConfig: Axi4Config, inputsCount: Int) extends Component with Product with Serializable
24.  case class Axi4ReadOnlyCC(axiConfig: Axi4Config, inputCd: ClockDomain, outputCd: ClockDomain, arFifoSize: Int, rFifoSize: Int) extends Component with Product with Serializable
25.  case class Axi4ReadOnlyChecker(config: Axi4Config, counterWidth: Int = 12) extends Component with Product with Serializable
26.  class Axi4ReadOnlyCompactor extends Component
27.  case class Axi4ReadOnlyDecoder(axiConfig: Axi4Config, decodings: Seq[SizeMapping], pendingMax: Int = 7) extends Component with Product with Serializable
28.  case class Axi4ReadOnlyDownsizer(inputConfig: Axi4Config, outputConfig: Axi4Config) extends Component with Product with Serializable
29.  case class Axi4ReadOnlyErrorSlave(axiConfig: Axi4Config) extends Component with Product with Serializable
30.  class Axi4ReadOnlyIdRemover extends Component
31.  class Axi4ReadOnlyOnePerId extends Component
32.  class Axi4ReadOnlyToTilelink extends Component
33.  class Axi4ReadOnlyToTilelinkFull extends Component
34.  class Axi4ReadOnlyUnburster extends Component

    Converts Axi4 burst streams into single beat transactions and adds last as required.

    Converts Axi4 burst streams into single beat transactions and adds last as required. AR channel will block if the pending transactions FIFO is full for that ID.

    Warning, the implementation currently work only for in order ar -> r responses

35.  case class Axi4ReadOnlyUpsizer(inputConfig: Axi4Config, outputConfig: Axi4Config, pendingQueueSize: Int) extends Component with Product with Serializable
36.  case class Axi4Shared(config: Axi4Config) extends Bundle with IMasterSlave with Axi4Bus with Product with Serializable
37.  case class Axi4SharedArbiter(outputConfig: Axi4Config, readInputsCount: Int, writeInputsCount: Int, sharedInputsCount: Int, routeBufferSize: Int, routeBufferLatency: Int = 0, routeBufferM2sPipe: Boolean = false, routeBufferS2mPipe: Boolean = false) extends Component with Product with Serializable
38.  case class Axi4SharedCC(axiConfig: Axi4Config, inputCd: ClockDomain, outputCd: ClockDomain, arwFifoSize: Int, rFifoSize: Int, wFifoSize: Int, bFifoSize: Int) extends Component with Product with Serializable
39.  case class Axi4SharedChecker(config: Axi4Config, counterWidth: Int = 12) extends Component with Product with Serializable
40.  case class Axi4SharedDecoder(axiConfig: Axi4Config, readDecodings: Seq[SizeMapping], writeDecodings: Seq[SizeMapping], sharedDecodings: Seq[SizeMapping], pendingMax: Int = 7) extends Component with Product with Serializable
41.  case class Axi4SharedErrorSlave(axiConfig: Axi4Config) extends Component with Product with Serializable
42.  class Axi4SharedIdRemover extends Component
43.  case class Axi4SharedOnChipRam(dataWidth: Int, byteCount: BigInt, idWidth: Int, arwStage: Boolean = false) extends Component with Product with Serializable
44.  class Axi4SharedOnChipRamMultiPort extends Component
45.  case class Axi4SharedOnChipRamPort(config: Axi4Config) extends ImplicitArea[Axi4Shared] with Product with Serializable
46.  case class Axi4SharedToApb3Bridge(addressWidth: Int, dataWidth: Int, idWidth: Int) extends Component with Product with Serializable
47.  class Axi4SharedToAxi3Shared extends Component
48.  class Axi4SharedToBram extends Component

    Axi4 <-> BRAM bus with burst WARNING do not support byte mask !!

49.  class Axi4SlaveFactory extends BusSlaveFactoryDelayed
50.  class Axi4ToTilelinkFiber extends Area
51.  case class Axi4Upsizer(inputConfig: Axi4Config, outputConfig: Axi4Config, readPendingQueueSize: Int) extends Component with Product with Serializable
52.  case class Axi4W(config: Axi4Config) extends Bundle with Product with Serializable

    Definition of the Write data channel

    Definition of the Write data channel

    config

    Axi4 configuration class

53.  case class Axi4WriteOnly(config: Axi4Config) extends Bundle with IMasterSlave with Axi4Bus with Product with Serializable
54.  class Axi4WriteOnlyAligner extends Component
55.  case class Axi4WriteOnlyArbiter(outputConfig: Axi4Config, inputsCount: Int, routeBufferSize: Int, routeBufferLatency: Int = 0, routeBufferS2mPipe: Boolean = false, routeBufferM2sPipe: Boolean = false) extends Component with Product with Serializable
56.  case class Axi4WriteOnlyCC(axiConfig: Axi4Config, inputCd: ClockDomain, outputCd: ClockDomain, awFifoSize: Int, wFifoSize: Int, bFifoSize: Int) extends Component with Product with Serializable
57.  class Axi4WriteOnlyCompactor extends Component
58.  case class Axi4WriteOnlyDecoder(axiConfig: Axi4Config, decodings: Seq[SizeMapping], pendingMax: Int = 7) extends Component with Product with Serializable
59.  case class Axi4WriteOnlyDownsizer(inputConfig: Axi4Config, outputConfig: Axi4Config, rspDepth: Int = 2) extends Component with Product with Serializable
60.  case class Axi4WriteOnlyErrorSlave(axiConfig: Axi4Config) extends Component with Product with Serializable

    Created by spinalvm on 13.06.17.

61.  class Axi4WriteOnlyIdRemover extends Component
62.  class Axi4WriteOnlyOnePerId extends Component
63.  class Axi4WriteOnlyToTilelink extends Component
64.  class Axi4WriteOnlyToTilelinkFull extends Component
65.  class Axi4WriteOnlyUnburster extends Component

    Converts Axi4 burst streams into single beat transactions and generates a single write response.

    Converts Axi4 burst streams into single beat transactions and generates a single write response. AW channel will block if the pending transactions FIFO is full for that ID.

66.  case class Axi4WriteOnlyUpsizer(inputConfig: Axi4Config, outputConfig: Axi4Config) extends Component with Product with Serializable
67.  case class FormalAxi4Record(config: Axi4Config, maxStrbs: Int) extends Bundle with Product with Serializable
68.  class UnbursterIDManager extends Component