Packages

class Axi4Ar extends Axi4Ax

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Inherited
  1. Axi4Ar
  2. Axi4Ax
  3. Bundle
  4. ValCallbackRec
  5. ValCallback
  6. MultiData
  7. Data
  8. InComponent
  9. OverridedEqualsHashCode
  10. SpinalTagReady
  11. Assignable
  12. NameableByComponent
  13. Nameable
  14. OwnableRef
  15. ContextUser
  16. ScalaLocated
  17. GlobalDataUser
  18. AnyRef
  19. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new Axi4Ar(config: Axi4Config)

Type Members

  1. abstract type RefOwnerType
    Definition Classes
    OwnableRef

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. def ##(right: Data): Bits

    Concatenation between two signals

    Concatenation between two signals

    Definition Classes
    Data
  3. final def ##(): Int
    Definition Classes
    AnyRef → Any
  4. def #*(count: Int): Bits

    Return the count time concatenation of the signal.

    Return the count time concatenation of the signal.

    Definition Classes
    Data
  5. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  6. def IFparent: Data
    Definition Classes
    Data
  7. val _spinalTags: LinkedHashSet[SpinalTag]
    Definition Classes
    SpinalTagReady
  8. def addAttribute(attribute: Attribute): Axi4Ar.this.type
    Definition Classes
    Data → SpinalTagReady
  9. def addAttribute(name: String, value: Int): Axi4Ar.this.type
    Definition Classes
    SpinalTagReady
  10. def addAttribute(name: String, value: String): Axi4Ar.this.type
    Definition Classes
    SpinalTagReady
  11. def addAttribute(name: String): Axi4Ar.this.type
    Definition Classes
    SpinalTagReady
  12. def addTag[T <: SpinalTag](spinalTag: T): Axi4Ar.this.type
    Definition Classes
    MultiData → SpinalTagReady
  13. def addTags(h: SpinalTag, tail: SpinalTag*): Axi4Ar.this.type
    Definition Classes
    SpinalTagReady
  14. def addTags[T <: SpinalTag](tags: Iterable[T]): Axi4Ar.this.type
    Definition Classes
    SpinalTagReady
  15. val addr: UInt
    Definition Classes
    Axi4Ax
  16. val allStrb: Bool
    Definition Classes
    Axi4Ax
  17. def allowDirectionLessIo(): Axi4Ar.this.type

    Allow a signal of an io Bundle to be directionless.

    Allow a signal of an io Bundle to be directionless.

    Definition Classes
    Data
    See also

    IO Bundle Error Documentation

  18. def allowOverride(): Axi4Ar.this.type

    Allow a signal to be overridden.

    Allow a signal to be overridden.

    Definition Classes
    Data
    See also

    Assignment overlap Error Documentation

  19. def allowPartialyAssigned(): Axi4Ar.this.type

    Allow a register to be partially assigned

    Allow a register to be partially assigned

    Definition Classes
    Data
  20. def allowPruning(): Axi4Ar.this.type
    Definition Classes
    Data
  21. def allowSimplifyIt(): Axi4Ar.this.type
    Definition Classes
    Data
  22. def allowUnsetRegToAvoidLatch(): Axi4Ar.this.type

    Allow a register to have only an init (no assignments)

    Allow a register to have only an init (no assignments)

    Definition Classes
    Data
    See also

    "Register with only init" Error Documentation

  23. def as[T <: Data](dataType: HardType[T]): T
    Definition Classes
    Data
  24. def asBits: Bits

    Cast signal to Bits

    Cast signal to Bits

    Definition Classes
    MultiData → Data
  25. def asData: Data
    Definition Classes
    Data
  26. def asInOut(): Axi4Ar.this.type

    Set a signal as inout

    Set a signal as inout

    Definition Classes
    MultiData → Data
  27. def asInput(): Axi4Ar.this.type

    Set a data as input

    Set a data as input

    Definition Classes
    MultiData → Data
  28. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  29. def asOutput(): Axi4Ar.this.type

    Set a data as output

    Set a data as output

    Definition Classes
    MultiData → Data
  30. def asReversedBits: Bits

    Concatenate the bits of the elements in reverse order.

    Concatenate the bits of the elements in reverse order.

    This does not recurse, so elements which are composite will appear in forward order.

    Definition Classes
    MultiData
  31. def assignAllByName(that: Bundle): Unit

    Assign the bundle with an other bundle by name

    Assign the bundle with an other bundle by name

    Definition Classes
    Bundle
  32. def assignDontCare(): Axi4Ar.this.type

    Assign the default 'x' value to all signals composing this type.

    Assign the default 'x' value to all signals composing this type.

    Definition Classes
    Data
    See also

    Data type documentation

    "Don't care term" wikipedia article

  33. def assignDontCareToUnasigned(): Axi4Ar.this.type
    Definition Classes
    Data
  34. def assignFormalRandom(kind: RandomExpKind): Unit
    Definition Classes
    MultiData → Data
  35. final def assignFrom(that: AnyRef, target: AnyRef = this)(implicit loc: Location): Unit
    Definition Classes
    Data
  36. def assignFromBits(bits: Bits, hi: Int, lo: Int): Unit
    Definition Classes
    MultiData → Data
  37. def assignFromBits(bits: Bits): Unit
    Definition Classes
    MultiData → Data
  38. def assignFromBits(bits: Bits, offset: Int, bitCount: BitCount): Unit
    Definition Classes
    Data
  39. def assignFromImpl(that: AnyRef, target: AnyRef, kind: AnyRef)(implicit loc: Location): Unit
    Attributes
    protected
    Definition Classes
    Bundle → Assignable
  40. def assignSomeByName(that: Bundle): Unit

    Assign all possible signal fo the bundle with an other bundle by name

    Assign all possible signal fo the bundle with an other bundle by name

    Definition Classes
    Bundle
  41. def assignUnassignedByName(that: MultiData): Unit
    Definition Classes
    MultiData
  42. def bundleAssign(that: Bundle)(f: (Data, Data) ⇒ Unit): Unit
    Definition Classes
    Bundle
  43. val burst: Bits
    Definition Classes
    Axi4Ax
  44. val cache: Bits
    Definition Classes
    Axi4Ax
  45. def checkDir(that: Bundle): Boolean

    for interface find modport

    for interface find modport

    Definition Classes
    Bundle
  46. def clearAll(): Axi4Ar.this.type

    Clear all bits to False and return itself

    Clear all bits to False and return itself

    Definition Classes
    Data
  47. def clone(): Axi4Ar.this.type
    Definition Classes
    Axi4Ar → Axi4Ax → Bundle → Data → AnyRef
  48. def component: Component
    Definition Classes
    ContextUser
  49. final def compositAssignFrom(that: AnyRef, target: AnyRef, kind: AnyRef)(implicit loc: Location): Unit
    Definition Classes
    Assignable
  50. val compositeAssign: Assignable
    Definition Classes
    Assignable
  51. val config: Axi4Config
    Definition Classes
    Axi4Ax
  52. def copyDirectionOfImpl(that: Data): Axi4Ar.this.type
    Definition Classes
    MultiData → Data
  53. def dirString(): String
    Definition Classes
    Data
  54. def dontSimplifyIt(): Axi4Ar.this.type
    Definition Classes
    Data
  55. def elements: ArrayBuffer[(String, Data)]
    Definition Classes
    Bundle → MultiData
  56. var elementsCache: ArrayBuffer[(String, Data)]
    Definition Classes
    Bundle
  57. def elementsString: String
    Definition Classes
    MultiData
  58. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  59. def equals(obj: Any): Boolean
    Definition Classes
    OverridedEqualsHashCode → AnyRef → Any
  60. def existsTag(cond: (SpinalTag) ⇒ Boolean): Boolean
    Definition Classes
    SpinalTagReady
  61. def filterTag(cond: (SpinalTag) ⇒ Boolean): Iterable[SpinalTag]
    Definition Classes
    SpinalTagReady
  62. def find(name: String): Data
    Definition Classes
    MultiData
  63. def findTag(cond: (SpinalTag) ⇒ Boolean): Option[SpinalTag]
    Definition Classes
    SpinalTagReady
  64. def flatten: Seq[BaseType]
    Definition Classes
    MultiData → Data
  65. def flattenForeach(body: (BaseType) ⇒ Unit): Unit
    Definition Classes
    MultiData → Data
  66. def flattenLocalName: Seq[String]
    Definition Classes
    MultiData → Data
  67. def flip(): Axi4Ar.this.type

    Flip the direction of the signal.

    Flip the direction of the signal.

    in and out are swapped, inout stay the same.

    Definition Classes
    MultiData → Data
  68. def foreachReflectableNameables(doThat: (Any) ⇒ Unit): Unit
    Definition Classes
    Nameable
  69. def foreachTag(body: (SpinalTag) ⇒ Unit): Unit
    Definition Classes
    SpinalTagReady
  70. def formalContext(): Composite[Axi4Ax] { ... /* 13 definitions in type refinement */ }
    Definition Classes
    Axi4Ax
  71. def freeze(): Axi4Ar.this.type
    Definition Classes
    MultiData → Data
  72. def getAddrSizeMaskedLow(): UInt
    Definition Classes
    Axi4Ax
  73. def getAheadValue(): Axi4Ar.this.type

    For a register, get the value it will have at the next clock, as a combinational signal.

    For a register, get the value it will have at the next clock, as a combinational signal.

    Definition Classes
    Data
  74. def getBitsWidth: Int

    Return the width of the data

    Return the width of the data

    Definition Classes
    MultiData → Data
  75. def getBurstBytesMinusOne(boundaryWidth: Int = Axi4.boundaryWidth): UInt
    Definition Classes
    Axi4Ax
  76. final def getClass(): Class[_]
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @IntrinsicCandidate()
  77. def getComponent(): Component
    Definition Classes
    Data → InComponent → NameableByComponent
  78. def getComponents(): Seq[Component]

    Get current component with all parents

    Get current component with all parents

    Definition Classes
    InComponent
  79. def getDirection: IODirection
    Definition Classes
    Data
  80. def getDisplayName(): String
    Definition Classes
    Nameable
  81. def getFirstBeatBytesMinusOne(): UInt
    Definition Classes
    Axi4Ax
  82. def getInstanceCounter: Int
    Definition Classes
    ContextUser
  83. def getLenAlignedAddr(): UInt
    Definition Classes
    Axi4Ax
  84. def getLenOnDataWidth(dataWidth: Int): UInt
    Definition Classes
    Axi4Ax
  85. def getMode: Byte
    Attributes
    protected
    Definition Classes
    Nameable
  86. def getMuxType[T <: Data](list: TraversableOnce[T]): HardType[T]
    Definition Classes
    Data
  87. def getName(default: String): String
    Definition Classes
    NameableByComponent → Nameable
  88. def getName(): String
    Definition Classes
    NameableByComponent → Nameable
  89. def getPartialName(): String
    Definition Classes
    Nameable
  90. def getPath(from: Component, to: Component): Seq[Component]
    Definition Classes
    NameableByComponent
  91. def getRealSource: Any
    Definition Classes
    Assignable
  92. def getRealSourceNoRec: Any
    Definition Classes
    Data → Assignable
  93. def getRefOwnersChain(): List[Any]
    Definition Classes
    OwnableRef
  94. def getRootParent: Data
    Definition Classes
    Data
  95. def getRtlPath(separator: String = "/"): String
    Definition Classes
    Data
  96. def getScalaLocationLong: String
    Definition Classes
    ScalaLocated
  97. def getScalaLocationShort: String
    Definition Classes
    ScalaLocated
  98. def getScalaTrace(): Throwable
    Definition Classes
    ScalaLocated
  99. def getTag[T <: SpinalTag](clazz: Class[T]): Option[T]
    Definition Classes
    SpinalTagReady
  100. def getTags(): LinkedHashSet[SpinalTag]
    Definition Classes
    SpinalTagReady
  101. def getTagsOf[T <: SpinalTag]()(implicit tag: ClassTag[T]): Iterable[T]
    Definition Classes
    SpinalTagReady
  102. def getTypeString: String
    Definition Classes
    Bundle
  103. def getZero: Axi4Ar.this.type

    Create a signal set to 0

    Create a signal set to 0

    Definition Classes
    MultiData → Data
  104. val globalData: GlobalData
    Definition Classes
    GlobalDataUser
  105. var hardtype: HardType[_]
    Definition Classes
    Bundle
  106. def hasTag[T <: SpinalTag](clazz: Class[T]): Boolean
    Definition Classes
    SpinalTagReady
  107. def hasTag(spinalTag: SpinalTag): Boolean
    Definition Classes
    SpinalTagReady
  108. def hashCode(): Int
    Definition Classes
    OverridedEqualsHashCode → AnyRef → Any
  109. val id: UInt
    Definition Classes
    Axi4Ax
  110. final def initFrom(that: AnyRef, target: AnyRef = this): Unit
    Definition Classes
    Data
  111. def instanceAttributes(language: Language): Iterable[Attribute]
    Definition Classes
    SpinalTagReady
  112. def instanceAttributes: Iterable[Attribute]
    Definition Classes
    SpinalTagReady
  113. def isAnalog: Boolean
    Definition Classes
    Data
  114. def isComb: Boolean
    Definition Classes
    Data
  115. def isCompletelyUnnamed: Boolean
    Definition Classes
    Nameable
  116. def isDirectionLess: Boolean
    Definition Classes
    Data
  117. def isEmptyOfTag: Boolean
    Definition Classes
    SpinalTagReady
  118. def isFIXED(): Bool
    Definition Classes
    Axi4Ax
  119. def isINCR(): Bool
    Definition Classes
    Axi4Ax
  120. def isInOut: Boolean
    Definition Classes
    Data
  121. def isInput: Boolean
    Definition Classes
    Data
  122. def isInputOrInOut: Boolean
    Definition Classes
    Data
  123. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  124. final def isNamed: Boolean
    Definition Classes
    Nameable
  125. def isOutput: Boolean
    Definition Classes
    Data
  126. def isOutputOrInOut: Boolean
    Definition Classes
    Data
  127. def isPriorityApplicable(namePriority: Byte): Boolean
    Definition Classes
    Nameable
  128. def isReg: Boolean
    Definition Classes
    Data
  129. def isRegOnAssign: Boolean
    Definition Classes
    Data
  130. def isUnnamed: Boolean
    Definition Classes
    NameableByComponent → Nameable
  131. val len: UInt
    Definition Classes
    Axi4Ax
  132. val lock: Bits
    Definition Classes
    Axi4Ax
  133. val name: String
    Definition Classes
    Nameable
  134. val nameableRef: Nameable
    Attributes
    protected
    Definition Classes
    Nameable
    Annotations
    @DontName()
  135. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  136. def noBackendCombMerge(): Axi4Ar.this.type

    Put the combinatorial logic driving this signal in a separate process

    Put the combinatorial logic driving this signal in a separate process

    Definition Classes
    Data
  137. def noCombLoopCheck(): Axi4Ar.this.type

    Disable combinatorial loop checking for this Data

    Disable combinatorial loop checking for this Data

    Definition Classes
    Data
    See also

    Combinatorial loop Error Documentation

  138. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @IntrinsicCandidate()
  139. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @IntrinsicCandidate()
  140. def onEachAttributes(doIt: (Attribute) ⇒ Unit): Unit
    Definition Classes
    SpinalTagReady
  141. def overrideLocalName(name: String): Axi4Ar.this.type
    Definition Classes
    Nameable
  142. val parent: Data
    Definition Classes
    Data
  143. val parentScope: ScopeStatement
    Definition Classes
    ContextUser
  144. val prot: Bits
    Definition Classes
    Axi4Ax
  145. def pull(propagateName: Boolean): Axi4Ar.this.type
    Definition Classes
    Data
  146. def pull(): Axi4Ar.this.type

    Pull a signal to the top level (use for debugging)

    Pull a signal to the top level (use for debugging)

    Definition Classes
    Data
  147. def purify(): Axi4Ar.this.type
    Definition Classes
    Data
  148. val qos: Bits
    Definition Classes
    Axi4Ax
  149. def randBoot(u: Unit): Axi4Ar.this.type

    Useful for register that doesn't need a reset value in RTL, but need a random value for simulation (avoid x-propagation)

    Useful for register that doesn't need a reset value in RTL, but need a random value for simulation (avoid x-propagation)

    Definition Classes
    Data
  150. val refOwner: RefOwnerType
    Definition Classes
    OwnableRef
    Annotations
    @DontName()
  151. def reflectNames(): Unit
    Definition Classes
    Nameable
  152. val region: Bits
    Definition Classes
    Axi4Ax
  153. def removeAssignments(data: Boolean = true, init: Boolean = true, initial: Boolean = true): Axi4Ar.this.type
    Definition Classes
    Data
  154. def removeDataAssignments(): Axi4Ar.this.type
    Definition Classes
    Data
  155. def removeInitAssignments(): Axi4Ar.this.type
    Definition Classes
    Data
  156. def removeTag(spinalTag: SpinalTag): Axi4Ar.this.type
    Definition Classes
    SpinalTagReady
  157. def removeTags(tags: Iterable[SpinalTag]): Axi4Ar.this.type
    Definition Classes
    SpinalTagReady
  158. def resized: Axi4Ar.this.type

    Return a version of the signal which is allowed to be automatically resized where needed.

    Return a version of the signal which is allowed to be automatically resized where needed.

    The resize operation is deferred until the point of assignment later. The resize may widen or truncate, retaining the LSB.

    Definition Classes
    Data
    See also

    Width checking Documentation

  159. def rootIF(): Interface

    root interface

    root interface

    Definition Classes
    Data
  160. def rootIFList(): List[Interface]
    Definition Classes
    Data
  161. def rootIFrec(now: Data, lastRoot: List[Interface]): List[Interface]
    Definition Classes
    Data
  162. val scalaTrace: Throwable
    Definition Classes
    ScalaLocated
  163. def setAll(): Axi4Ar.this.type

    Set all bits to True and return itself

    Set all bits to True and return itself

    Definition Classes
    Data
  164. def setAsAnalog(): Axi4Ar.this.type
    Definition Classes
    Data
  165. def setAsComb(): Axi4Ar.this.type

    Set baseType to Combinatorial

    Set baseType to Combinatorial

    Definition Classes
    MultiData → Data
  166. def setAsDirectionLess(): Axi4Ar.this.type

    Remove the direction (in, out, inout) to a signal

    Remove the direction (in, out, inout) to a signal

    Definition Classes
    MultiData → Data
  167. def setAsReg(): Axi4Ar.this.type

    Set baseType to reg

    Set baseType to reg

    Definition Classes
    MultiData → Data
  168. def setBurstFIXED(): Unit
    Definition Classes
    Axi4Ax
  169. def setBurstINCR(): Unit
    Definition Classes
    Axi4Ax
  170. def setBurstWRAP(): Unit
    Definition Classes
    Axi4Ax
  171. def setCache(cacheType: Bits): Unit
    Definition Classes
    Axi4Ax
  172. def setCompositeName(nameable: Nameable, postfix: String, namePriority: Byte): Axi4Ar.this.type
    Definition Classes
    Nameable
  173. def setCompositeName(nameable: Nameable, postfix: String, weak: Boolean): Axi4Ar.this.type
    Definition Classes
    Nameable
  174. def setCompositeName(nameable: Nameable, postfix: String): Axi4Ar.this.type
    Definition Classes
    Nameable
  175. def setCompositeName(nameable: Nameable, namePriority: Byte): Axi4Ar.this.type
    Definition Classes
    Nameable
  176. def setCompositeName(nameable: Nameable, weak: Boolean): Axi4Ar.this.type
    Definition Classes
    Nameable
  177. def setCompositeName(nameable: Nameable): Axi4Ar.this.type
    Definition Classes
    Nameable
  178. def setFullSize(): Unit
    Definition Classes
    Axi4Ax
  179. def setLambdaName(isNameBody: ⇒ Boolean)(nameGen: ⇒ String): Axi4Ar.this.type
    Definition Classes
    Nameable
  180. def setLock(lockType: Bits): Unit
    Definition Classes
    Axi4Ax
  181. def setName(name: String, namePriority: Byte): Axi4Ar.this.type
    Definition Classes
    Nameable
  182. def setName(name: String, weak: Boolean): Axi4Ar.this.type
    Definition Classes
    Nameable
  183. def setName(name: String): Axi4Ar.this.type
    Definition Classes
    Nameable
  184. def setNameAsWeak(): Axi4Ar.this.type
    Definition Classes
    Nameable
  185. def setOutputAsReg(): Axi4Ar.this.type

    Recursively set baseType to reg only for output

    Recursively set baseType to reg only for output

    Definition Classes
    Data
  186. def setPartialName(name: String, namePriority: Byte, owner: Any): Axi4Ar.this.type
    Definition Classes
    Nameable
  187. def setPartialName(name: String, namePriority: Byte): Axi4Ar.this.type
    Definition Classes
    Nameable
  188. def setPartialName(name: String, weak: Boolean): Axi4Ar.this.type
    Definition Classes
    Nameable
  189. def setPartialName(owner: Nameable, name: String, namePriority: Byte): Axi4Ar.this.type
    Definition Classes
    Nameable
  190. def setPartialName(owner: Nameable, name: String, weak: Boolean): Axi4Ar.this.type
    Definition Classes
    Nameable
  191. def setPartialName(name: String): Axi4Ar.this.type
    Definition Classes
    Nameable
  192. def setPartialName(owner: Nameable, name: String): Axi4Ar.this.type
    Definition Classes
    Nameable
  193. def setPartialName(owner: Nameable): Axi4Ar.this.type
    Definition Classes
    Nameable
  194. def setProt(protType: Bits): Unit
    Definition Classes
    Axi4Ax
  195. def setQos(qosType: Bits): Unit
    Definition Classes
    Axi4Ax
  196. def setRefOwner(that: Any): Unit
    Definition Classes
    OwnableRef
  197. def setScalaLocated(source: ScalaLocated): Axi4Ar.this.type
    Definition Classes
    ScalaLocated
  198. def setSize(sizeBurst: UInt): Unit
    Definition Classes
    Axi4Ax
  199. def setWeakName(name: String): Axi4Ar.this.type
    Definition Classes
    Nameable
  200. val size: UInt
    Definition Classes
    Axi4Ax
  201. def spinalTags: LinkedHashSet[SpinalTag]
    Definition Classes
    SpinalTagReady
  202. final def synchronized[T0](arg0: ⇒ T0): T0
    Definition Classes
    AnyRef
  203. def toIo(): Axi4Ar.this.type
    Definition Classes
    Data
  204. def toMuxInput[T <: Data](muxOutput: T): T
    Definition Classes
    Data
  205. def toString(): String
    Definition Classes
    Bundle → Nameable → AnyRef → Any
  206. def unfreeze(): Axi4Ar.this.type
    Definition Classes
    MultiData → Data
  207. def unsetName(): Axi4Ar.this.type
    Definition Classes
    Nameable
  208. val user: Bits
    Definition Classes
    Axi4Ax
  209. val userWidth: Int
    Definition Classes
    Axi4Ax
  210. def valCallback[T](ref: T, name: String): T
    Definition Classes
    ValCallbackRec → ValCallback
  211. def valCallbackOn(ref: Any, name: String, refs: Set[Any]): Unit
    Definition Classes
    ValCallbackRec
  212. def valCallbackRec(ref: Any, name: String): Unit
    Definition Classes
    Bundle → ValCallbackRec
  213. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  214. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native()
  215. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  216. def wrapNext(): Axi4Ar.this.type
    Definition Classes
    Data
  217. def zipByName(that: MultiData, rec: ArrayBuffer[(BaseType, BaseType)] = ArrayBuffer()): ArrayBuffer[(BaseType, BaseType)]
    Definition Classes
    MultiData

Deprecated Value Members

  1. def asDirectionLess(): Axi4Ar.this.type
    Definition Classes
    Data
    Annotations
    @deprecated
    Deprecated

    (Since version ???) use setAsDirectionLess instead

  2. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] ) @Deprecated
    Deprecated
  3. def genIf(cond: Boolean): Axi4Ar.this.type

    Generate this if condition is true

    Generate this if condition is true

    Definition Classes
    Data
    Annotations
    @deprecated
    Deprecated

    does not work with <>, use 'someBool generate Type()' or 'if(condition) Type() else null' instead

Inherited from Axi4Ax

Inherited from Bundle

Inherited from ValCallbackRec

Inherited from ValCallback

Inherited from MultiData

Inherited from Data

Inherited from InComponent

Inherited from OverridedEqualsHashCode

Inherited from SpinalTagReady

Inherited from Assignable

Inherited from NameableByComponent

Inherited from Nameable

Inherited from OwnableRef

Inherited from ContextUser

Inherited from ScalaLocated

Inherited from GlobalDataUser

Inherited from AnyRef

Inherited from Any

Ungrouped