Packages

trait SpinalTagReady extends AnyRef

Linear Supertypes
AnyRef, Any
Known Subclasses
AFix, BaseType, BitVector, Bits, BlackBox, BlackBoxULogic, Bool, BoolEdges, Bundle, BundleCase, ClockDomain, Component, Data, DataWrapper, HardMap, Interface, Mem, MemPortStatement, MemReadAsync, MemReadSync, MemReadWrite, MemWrite, MemWritePayload, MultiData, Ram_1w_1ra, Ram_1w_1rs, Ram_1wors, Ram_1wrs, Ram_2c_1w_1rs, Ram_2wrs, Ram_Generic, SFix, SFix2D, SInt, SpinalEnumCraft, SpinalEnumElement, SpinalStruct, TupleBundle1, TupleBundle10, TupleBundle11, TupleBundle12, TupleBundle13, TupleBundle14, TupleBundle15, TupleBundle16, TupleBundle17, TupleBundle18, TupleBundle19, TupleBundle2, TupleBundle20, TupleBundle21, TupleBundle22, TupleBundle3, TupleBundle4, TupleBundle5, TupleBundle6, TupleBundle7, TupleBundle8, TupleBundle9, TupleBundleBase, UFix, UFix2D, UInt, UInt2D, Union, Vec, XFix, AssertStatement, Equal, EqualSim, NotEqual, Equal, EqualSim, NotEqual, Equal, EqualSim, NotEqual, Smaller, SmallerOrEqual, Equal, EqualSim, NotEqual, Smaller, SmallerOrEqual, BufferCC, BufferCCBlackBox, Flow, FlowCCUnsafeByToggle, FlowCmdRsp, Fragment, HistoryModifyable, MemReadPort, MemReadPortAsync, MemReadStreamFlowPort, MemReadWritePort, MemWriteCmd, MemWriteCmdWithMask, NoData, PackedBundle, PackedWordBundle, PulseCCByToggle, ReadRetLinked, SamplerCC, Stream, StreamAccessibleFifo, StreamArbiter, StreamCCByToggle, StreamDelay, StreamDelayWord, StreamDemux, StreamFifo, StreamFifoCC, StreamFifoLowLatency, StreamFifoMultiChannelPop, StreamFifoMultiChannelPush, StreamFifoMultiChannelSharedSpace, StreamFork, StreamMux, StreamShiftChain, StreamToStreamFragmentBits, StreamTransactionCounter, StreamTransactionExtender, Wrapper, VJTAG, sld_virtual_jtag, EG_LOGIC_BUFG, EG_LOGIC_ODDR, EG_PHY_BRAM, EG_PHY_BRAM32K, EG_PHY_SDRAM_2M_32, BB, DCCA, EHXPLLL, IDDRX1F, IFS1P3BX, JTAGG, JtaggIo, ODDRX1F, OFS1P3BX, TSFF, Ulx3sUsrMclk, ICE40_PLL, SB_DFFR, SB_DFFS, SB_GB, SB_IO, SB_PLL40_CORE, SB_PLL40_PAD, SB_SPRAM256KA, BSCANE2, BUFG, BUFGCE, BUFIO, FDRE, IBUF, IBUFG, IDELAYCTRL, IDELAYE2, IOBUF, IOBUFDS, ISERDESE2, MMCME2_BASE, Mmcme2Ctrl, Mmcme2Dbus, OBUFDS, ODELAYE2, OSERDESE2, PLLE2_BASE, STARTUPE2, AhbLite3, AhbLite3Arbiter, AhbLite3Decoder, AhbLite3Master, AhbLite3OnChipRam, AhbLite3OnChipRamMultiPort, AhbLite3OnChipRom, AhbLite3ToApb3Bridge, DefaultAhbLite3Slave, Apb3, Apb3CC, Cmd, Rsp, Apb3CCToggle, Apb3Decoder, Apb3Dummy, Apb3Gpio, Apb3Router, Apb3ToBmb, Apb4, Apb4Hub, Axi4, Axi4Ar, Axi4ArUnburstified, Axi4Arw, Axi4ArwUnburstified, Axi4Aw, Axi4AwUnburstified, Axi4Ax, Axi4AxUnburstified, Axi4B, Axi4CC, Axi4Downsizer, Axi4DownsizerSubTransactionGenerator, Axi4IdRemover, Axi4R, Axi4ReadOnly, Axi4ReadOnlyAligner, Context, Axi4ReadOnlyArbiter, Axi4ReadOnlyCC, Axi4ReadOnlyChecker, Axi4ReadOnlyCompactor, Context, Axi4ReadOnlyDecoder, Axi4ReadOnlyDownsizer, Axi4ReadOnlyErrorSlave, Axi4ReadOnlyIdRemover, Axi4ReadOnlyOnePerId, Axi4ReadOnlyOnePerIdRemap, Axi4ReadOnlyToTilelink, Axi4ReadOnlyToTilelinkFull, Axi4ReadOnlyUnburster, Axi4ReadOnlyUpsizer, RspContext, Axi4Shared, Axi4SharedArbiter, Axi4SharedCC, Axi4SharedChecker, Axi4SharedDecoder, Axi4SharedErrorSlave, Axi4SharedIdRemover, Axi4SharedOnChipRam, Axi4SharedOnChipRamMultiPort, Axi4SharedToApb3Bridge, Axi4SharedToAxi3Shared, Axi4SharedToBram, Axi4Upsizer, Axi4W, Axi4WriteOnly, Axi4WriteOnlyAligner, Context, WCmd, Axi4WriteOnlyArbiter, Axi4WriteOnlyCC, Axi4WriteOnlyCompactor, Context, Axi4WriteOnlyDecoder, Axi4WriteOnlyDownsizer, Axi4WriteOnlyErrorSlave, Axi4WriteOnlyIdRemover, Axi4WriteOnlyOnePerId, Axi4WriteOnlyOnePerIdRemap, Axi4WriteOnlyToTilelink, Axi4WriteOnlyToTilelinkFull, Axi4WriteOnlyUnburster, Axi4WriteOnlyUpsizer, FormalAxi4Record, UnbursterIDManager, IdLen, IdResp, AxiLite4, AxiLite4Ax, AxiLite4B, AxiLite4R, AxiLite4ReadOnly, AxiLite4SimpleReadDma, AxiLite4SimpleReadDmaCmd, AxiLite4W, AxiLite4WriteOnly, Axi4StreamBundle, Axi4StreamSimpleWidthAdapter, Axi4StreamSparseCompactor, Axi4StreamWidthAdapter, Axi4StreamWidthAdapter_8_8, AvalonMM, AvalonReadDma, AvalonReadDmaCmd, AvalonST, AvalonSTDelayAdapter, AvalonSTPayload, Axi4SharedToBmb, Bmb, BmbAck, BmbAlignedSpliter, Context, BmbAligner, BmbArbiter, BmbCcFifo, BmbCcToggle, BmbCmd, BmbContextRemover, Ctx, BmbDecoder, BmbDecoderOutOfOrder, SourceHistory, BmbDecoderPerSource, BmbDownSizerBridge, OutputContext, BmbEg4S20Bram32K, BmbErrorSlave, BmbExclusiveMonitor, BmbIce40Spram, BmbInv, BmbInvalidateMonitor, Context, BmbInvalidationArbiter, BmbLengthFixer, Context, BmbOnChipRam, BmbOnChipRamMultiPort, BmbRsp, BmbSourceDecoder, BmbSourceRemover, Context, BmbSync, BmbSyncRemover, Context, BmbToApb3Bridge, BmbToAxi4ReadOnlyBridge, BmbToAxi4SharedBridge, Info, BmbToAxi4SharedBridgeAssumeInOrder, Info, BmbToAxi4WriteOnlyBridge, BmbToTilelink, BmbToWishbone, BmbUnburstify, Context, BmbUpSizerBridge, OutputContext, BmbWriteRetainer, TilelinkToBmb, BRAM, BRAMDecoder, BsbDownSizerAlignedMultiWidth, BsbDownSizerDense, BsbDownSizerSparse, BsbPacketBuffer, BsbTransaction, BsbUpSizerDense, BsbUpSizerSparse, Node, MemBus, MinBus, AsyncMemoryBus, PipelinedMemoryBus, PipelinedMemoryBusArbiter, PipelinedMemoryBusCmd, PipelinedMemoryBusDecoder, PipelinedMemoryBusRsp, PipelinedMemoryBusToApbBridge, Apb3Bridge, Arbiter, Axi4Bridge, AxiLite4Bridge, Bus, BusFragment, ChannelA, ChannelB, ChannelC, ChannelD, ChannelE, ContextAsyncBufferBase, ContextAsyncBufferFull, ContextBufferAdd, ContextBufferQuery, ContextBufferRemove, Decoder, ErrorSlave, FifoCc, Ram, TransferFilter, WidthAdapter, Cache, CtrlCmd, CtxDownD, ProberCmd, PutMergeCmd, ReadBackendCmd, ReadDownCmd, Tags, WriteBackendCmd, DataPayload, FlushArbiter, FlushBus, FlushCmd, FlushRsp, Hub, CtxA, CtxC, DataPayload, ProbeCmd, ProbeCtx, ProbeCtxFull, OrderingCmd, Node, NodeRaw, NodeUpDown, Wishbone, WishboneAdapter, WishboneArbiter, WishboneDecoder, WishboneGpio, WishboneToBmb, BmbMacEth, Crc, Gmii, GmiiRx, GmiiTx, MacEth, MacEthCtrl, MacRxAligner, MacRxBuffer, MacRxCheckSumChecker, MacRxChecker, MacRxDropper, MacRxPreamble, MacTxAligner, MacTxBuffer, MacTxCrc, MacTxHeader, MacTxInterFrame, MacTxLso, MacTxManagedStreamFifoCc, MacTxPadder, Mdio, Mii, MiiRx, MiiTx, PhyIo, PhyRx, PhyTx, Rmii, RmiiRx, RmiiTx, MacBackend, MacEthPackets, MacEthSgCtrl, MacSg, Apb3I2cCtrl, BmbI2cCtrl, I2c, I2cAddress, I2cSlave, I2cSlaveBus, I2cSlaveCmd, I2cSlaveConfig, I2cSlaveIo, I2cSlaveRsp, TilelinkI2cCtrl, Jtag, JtagTapInstructionCtrl, SimpleJtagTap, VJtag2BmbMaster, SimpleJtagTap, Bscane2BmbMaster, Decoder, Encoder, Sio, Apb3SpiMasterCtrl, Apb3SpiSlaveCtrl, SpiHalfDuplexMaster, SpiKind, SpiMaster, SpiMasterCmd, SpiMasterCtrl, SpiMasterCtrlCmdData, SpiMasterCtrlCmdSs, SpiMasterCtrlConfig, SpiSlave, SpiSlaveCtrl, SpiSlaveCtrlIo, WishboneSpiMasterCtrl, WishboneSpiSlaveCtrl, Apb3SpiXdrMasterCtrl, BmbSpiXdrMasterCtrl, SpiXdrMaster, SpiIce40, Cmd, Config, Rsp, TopLevel, XipBus, XipCmd, XdrOutput, XdrPin, TilelinkSpiXdrMasterCtrl, Apb3UartCtrl, AvalonMMUartCtrl, BmbUartCtrl, TilelinkUartCtrl, Uart, UartCtrl, UartCtrlConfig, UartCtrlFrameConfig, UartCtrlIo, UartCtrlRx, UartCtrlTx, UartCtrlUsageExample, WishboneUartCtrl, UsbOhci, UsbOhciAxi4, UsbOhciAxi4Apb3, UsbOhciTilelink, UsbOhciWishbone, UsbDevicePhyNative, UsbHostManagementIo, Ctrl, CtrlCc, CtrlPort, CtrlRx, CtrlRxPayload, UsbLsFsPhy, UsbLsFsPhyAbstractIo, UsbLsFsPhyFilter, UsbPhyFsNativeIo, UsbDeviceCtrl, PhyCc, PhyIo, Rx, Tx, UsbDeviceWithPhyWishbone, DebugBus, DebugCapture, DebugCmd, DebugDmToHart, DebugHartBus, DebugHartToDm, DebugModule, DebugRsp, DebugSysBus, DebugSysBusCmd, DebugSysBusRsp, DebugTransportModuleJtagTap, DebugTransportModuleJtagTapWithTunnel, DebugTransportModuleTunneled, DebugUpdate, Alu, BranchPredictorLine, CoreDataBus, CoreDataCmd, CoreDecodeOutput, CoreExecute0Output, CoreExecute1Output, CoreFetchOutput, CoreInstructionBus, CoreInstructionCmd, CoreInstructionRsp, CoreWriteBack0Output, DataCache, LineInfo, DataCacheCpuBus, DataCacheCpuCmd, DataCacheCpuRsp, DataCacheMemBus, DataCacheMemCmd, DataCacheMemRsp, InstructionCache, LineInfo, InstructionCacheCpuBus, InstructionCacheCpuCmd, InstructionCacheCpuRsp, InstructionCacheFlushBus, TopLevel, InstructionCacheMemBus, InstructionCacheMemCmd, InstructionCacheMemRsp, RiscvCore, InstructionCtrl, TopLevel, TopLevel, RiscvAhbLite3, RiscvAvalon, RiscvAxi4, DebugExtensionBus, DebugExtensionCmd, DebugExtensionIo, DebugExtensionRsp, alt_inbuf, alt_inbuf_diff, alt_outbuf, alt_outbuf_diff, alt_outbuf_tri, alt_outbuf_tri_diff, ApbCmd, Block, Ctrl, CtrlCmd, Mem, MemCmd, SblCmd, SblReadCmd, SblReadDma, SblReadDmaCmd, SblReadRet, SblWriteCmd, Module, SerialCheckerPhysical, SerialCheckerPhysicalToSerial, SerialCheckerPhysicalfromSerial, SerialCheckerRx, SerialCheckerTx, SerialLinkRx, SerialLinkRxToTx, SerialLinkTx, SerialSafeLayerTx, SerialSafelLayerRx, Floating, FloatingCompareResult, RecFloating, LargeExample, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, TopLevel, GeneratorComponent, GeneratorComponent, Rgb, VideoDma, VideoDmaMem, Ycbcr, YcbcrPix2, TmdsEncoder, VgaToHdmiEcp5, AvalonMMVgaCtrl, Axi4VgaCtrl, BlinkingVgaCtrl, BmbVgaCtrl, TilelinkVgaCtrl, TilelinkVideoDma, Word, Vga, VgaBus, VgaCtrl, VgaRgbToYcbcr, VgaTimings, VgaTimingsHV, VgaYcbcrPix2, Apb3Gpio2, BmbGpio2, Ctrl, D, E, ReadableOpenDrain, TilelinkGpio2, TriState, TriStateArray, TriStateOutput, MixedDivider, MixedDividerCmd, MixedDividerRsp, SignedDivider, SignedDividerCmd, SignedDividerRsp, UnsignedDivider, UnsignedDividerCmd, UnsignedDividerRsp, Dfi, DfiCATrainingInterface, DfiControlInterface, DfiErrorInterface, DfiLevelingTraingInterface, DfiLowPowerControlInterface, DfiPhyRequesetedTrainingInterface, DfiRd, DfiRdCs, DfiReadInterface, DfiReadTrainingInterface, DfiStatusInterface, DfiUpdateInterface, DfiWr, DfiWriteInterface, DfiWriteTrainingInterface, Alignment, BmbAdapter, BmbAlignedSpliter, Context, BmbAligner, BmbBridge, BmbToPreTaskPort, PackContext, BusAddress, CAAlignment, CmdTxd, Control, Dfi, DfiAddr, DfiCATrainingInterface, DfiCmd, DfiControlInterface, DfiController, DfiError, DfiErrorInterface, DfiInit, DfiLevelingTraingInterface, DfiLowPowerControlInterface, DfiLp, DfiLpCtrl, DfiOdt, DfiPhyLvlCs, DfiPhyRequesetedTrainingInterface, DfiPhyUp, DfiRd, DfiRdCs, DfiRdData, DfiRdGate, DfiRdGateCs, DfiRdLvl, DfiRdLvlCs, DfiReadCs, DfiReadInterface, DfiReadTrainingInterface, DfiStatusInterface, DfiUpdateInterface, DfiWr, DfiWrCs, DfiWrData, DfiWrLvl, DfiWrLvlCs, DfiWriteInterface, DfiWriteTrainingInterface, IDFI, MakeTask, Status, OpTasks, PreTaskPort, RdAlignment, RdDataRxd, Context, PipelineRsp, Refresher, SdramAddress, TaskPort, TaskRsp, TaskTimingConfig, TaskWrRdCmd, TaskWriteData, WrAlignment, WrDataTxd, Axi4SharedSdramCtrl, BmbSdramCtrl, Context, SdramCtrl, SdramCtrlAxi4SharedContext, SdramCtrlBackendCmd, SdramCtrlBank, SdramCtrlBus, SdramCtrlCmd, SdramCtrlRsp, SdramInterface, Backend, PipelineCmd, PipelineRsp, BmbAdapter, BmbToCorePort, Context, Core, CoreCmd, CoreConfig, CorePort, CoreRsp, CoreTask, CoreTasks, CoreWriteData, CtrlWithoutPhy, CtrlWithoutPhyBmb, InitCmd, Refresher, SdramAddress, SdramXdrIo, SdramXdrPhyCtrl, SdramXdrPhyCtrlPhase, SoftBus, Tasker, Status, Task, TimingEnforcer, mt41k128m16jt_model, mt48lc16m16a2_model, Ecp5Sdrx2Phy, PLLE2_ADV, RtlPhy, Address, RtlPhyInterface, RtlPhyWriteCmd, SdrInferedPhy, XilinxS7Phy, Apb3Clint, Apb3InterruptCtrl, AxiLite4Clint, BmbClint, BmbWatchdog, InterruptCtrl, MachineTimer, MappedClint, Prescaler, TilelinkClint, TilelinkWatchdog, Timer, WishboneClint, APlicDirectRequest, APlicGenMsiPayload, APlicGenericRequest, APlicMSIRequest, APlicMSITarget, APlicMsiPayload, ImsicRequest, ImsicTriggerMapper, MappedAPlic, MappedImsicTrigger, TilelinkAPlic, TilelinkAPlicMsiSender, TilelinkImsicTrigger, BmbBsbToDeltaSigma, BsbToDeltaSigma, SIntToSigmaDeltaSecondOrder, UIntToSigmaDeltaFirstOrder, PDMCore, Axi4Plic, AxiLite4Plic, MappedPlic, Request, TilelinkPlic, WishbonePlic, PipelineTop, Pinsec, PinsecTimerCtrl, PinsecTimerCtrlExternal, JtagAvalonDebugger, JtagAxi4SharedDebugger, JtagBridge, JtagBridgeNoTap, SystemDebugger, SystemDebuggerMemBus, SystemDebuggerMemCmd, SystemDebuggerRemoteBus, SystemDebuggerRsp, VJtagBridge, DmaMemoryCore, BankWord, DmaMemoryCoreReadBus, DmaMemoryCoreReadCmd, DmaMemoryCoreReadRsp, DmaMemoryCoreWriteBus, DmaMemoryCoreWriteCmd, DmaMemoryCoreWriteRsp, Aggregator, AggregatorCmd, AggregatorRsp, ChannelIo, Core, B2sReadContext, InputContext, M2bWriteContext, ReadContext, SgReadContext, SgWriteContext, WriteContext, SgBus, SgCmd, SgRsp, Word, DmaSgReadOnlyComp, Word, DmaSgWriteOnlyComp, PopDescriptor, VirtualEndpoint, FlowCCByToggle, StreamDispatcherSequencial
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  1. SpinalTagReady
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Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##(): Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. val _spinalTags: LinkedHashSet[SpinalTag]
  5. def addAttribute(name: String, value: Int): SpinalTagReady.this.type
  6. def addAttribute(name: String, value: String): SpinalTagReady.this.type
  7. def addAttribute(name: String): SpinalTagReady.this.type
  8. def addAttribute(attribute: Attribute): SpinalTagReady.this.type
  9. def addTag[T <: SpinalTag](spinalTag: T): SpinalTagReady.this.type
  10. def addTags(h: SpinalTag, tail: SpinalTag*): SpinalTagReady.this.type
  11. def addTags[T <: SpinalTag](tags: Iterable[T]): SpinalTagReady.this.type
  12. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  13. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native() @IntrinsicCandidate()
  14. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  15. def equals(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  16. def existsTag(cond: (SpinalTag) ⇒ Boolean): Boolean
  17. def filterTag(cond: (SpinalTag) ⇒ Boolean): Iterable[SpinalTag]
  18. def findTag(cond: (SpinalTag) ⇒ Boolean): Option[SpinalTag]
  19. def foreachTag(body: (SpinalTag) ⇒ Unit): Unit
  20. final def getClass(): Class[_]
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @IntrinsicCandidate()
  21. def getTag[T <: SpinalTag](clazz: Class[T]): Option[T]
  22. def getTags(): LinkedHashSet[SpinalTag]
  23. def getTagsOf[T <: SpinalTag]()(implicit tag: ClassTag[T]): Iterable[T]
  24. def hasTag[T <: SpinalTag](clazz: Class[T]): Boolean
  25. def hasTag(spinalTag: SpinalTag): Boolean
  26. def hashCode(): Int
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @IntrinsicCandidate()
  27. def instanceAttributes(language: Language): Iterable[Attribute]
  28. def instanceAttributes: Iterable[Attribute]
  29. def isEmptyOfTag: Boolean
  30. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  31. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  32. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @IntrinsicCandidate()
  33. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @IntrinsicCandidate()
  34. def onEachAttributes(doIt: (Attribute) ⇒ Unit): Unit
  35. def removeTag(spinalTag: SpinalTag): SpinalTagReady.this.type
  36. def removeTags(tags: Iterable[SpinalTag]): SpinalTagReady.this.type
  37. def spinalTags: LinkedHashSet[SpinalTag]
  38. final def synchronized[T0](arg0: ⇒ T0): T0
    Definition Classes
    AnyRef
  39. def toString(): String
    Definition Classes
    AnyRef → Any
  40. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  41. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native()
  42. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Deprecated Value Members

  1. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] ) @Deprecated
    Deprecated

Inherited from AnyRef

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