c

vexiiriscv.execute

LsuL1BusParameter

case class LsuL1BusParameter(addressWidth: Int, dataWidth: Int, readIdCount: Int, writeIdCount: Int, probeIdWidth: Int, ackIdWidth: Int, lineSize: Int, withReducedBandwidth: Boolean, withCoherency: Boolean) extends Product with Serializable

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Serializable, Serializable, Product, Equals, AnyRef, Any
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  1. LsuL1BusParameter
  2. Serializable
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  4. Product
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Instance Constructors

  1. new LsuL1BusParameter(addressWidth: Int, dataWidth: Int, readIdCount: Int, writeIdCount: Int, probeIdWidth: Int, ackIdWidth: Int, lineSize: Int, withReducedBandwidth: Boolean, withCoherency: Boolean)

Value Members

  1. val ackIdWidth: Int
  2. val addressWidth: Int
  3. val dataWidth: Int
  4. val lineSize: Int
  5. val probeIdWidth: Int
  6. val readIdCount: Int
  7. val readIdWidth: Int
  8. def toTileLinkM2sParameters(name: Nameable): M2sParameters
  9. val withCoherency: Boolean
  10. val withReducedBandwidth: Boolean
  11. val writeIdCount: Int
  12. val writeIdWidth: Int