c

spinal.lib.bus.regif

AxiLite4BusInterface

case class AxiLite4BusInterface(bus: AxiLite4, sizeMap: SizeMapping, regPre: String = "", withSecFireWall: Boolean = false)(implicit moduleName: ClassName) extends BusIf with Product with Serializable

Linear Supertypes
Serializable, Serializable, Product, Equals, BusIf, BusIfBase, Area, OverridedEqualsHashCode, ValCallbackRec, ValCallback, NameableByComponent, Nameable, ContextUser, ScalaLocated, GlobalDataUser, OwnableRef, AnyRef, Any
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  2. By Inheritance
Inherited
  1. AxiLite4BusInterface
  2. Serializable
  3. Serializable
  4. Product
  5. Equals
  6. BusIf
  7. BusIfBase
  8. Area
  9. OverridedEqualsHashCode
  10. ValCallbackRec
  11. ValCallback
  12. NameableByComponent
  13. Nameable
  14. ContextUser
  15. ScalaLocated
  16. GlobalDataUser
  17. OwnableRef
  18. AnyRef
  19. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new AxiLite4BusInterface(bus: AxiLite4, sizeMap: SizeMapping, regPre: String = "", withSecFireWall: Boolean = false)(implicit moduleName: ClassName)

Type Members

  1. abstract type B <: AxiLite4BusInterface.this.type
    Definition Classes
    BusIf
  2. abstract type RefOwnerType
    Definition Classes
    OwnableRef

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##(): Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def FifoInsts: ListBuffer[FifoInst]
    Definition Classes
    BusIf
  5. def RamInsts: ListBuffer[RamInst]
    Definition Classes
    BusIf
  6. def RegAndFifos: List[RegSlice]
    Definition Classes
    BusIf
  7. def RegInsts: ListBuffer[RegInst]
    Definition Classes
    BusIf
  8. val _addrAlignCheck: Boolean
    Attributes
    protected
    Definition Classes
    BusIfBase
  9. val _context: Capture
    Definition Classes
    Area
  10. def accept(doc: BusIfDoc): Unit
    Definition Classes
    BusIf
  11. def addrAlignCheck(address: BigInt): Unit
    Definition Classes
    BusIf
  12. def addressUsed(addr: BigInt): Boolean
    Definition Classes
    BusIf
  13. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  14. val askRead: Bool
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  15. val askWrite: Bool
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  16. val axiAr: Stream[AxiLite4Ax]
  17. val axiAw: Stream[AxiLite4Ax]
  18. val axiB: Stream[AxiLite4B]
  19. val axiBValid: Bool
  20. val axiR: Stream[AxiLite4R]
  21. val axiRValid: Bool
  22. val axiW: Stream[AxiLite4W]
  23. val blockId: Int
    Attributes
    protected
    Definition Classes
    BusIf
  24. def blockIdInc(): Unit
    Attributes
    protected
    Definition Classes
    BusIf
  25. val bus: AxiLite4
    Definition Classes
    AxiLite4BusInterface → BusIf
  26. val busAddrWidth: Int
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  27. def busByteWidth: Int
    Definition Classes
    BusIfBase
  28. val busDataWidth: Int
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  29. def busName: String
    Definition Classes
    BusIf
  30. val bus_err: Bool
  31. lazy val bus_nsbit: Bool
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  32. val bus_rdata: Bits
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  33. def bus_slverr: Bool
    Definition Classes
    BusIfBase
  34. def bw: Int
    Definition Classes
    BusIfBase
  35. lazy val cg_en: Bool
    Definition Classes
    BusIfBase
  36. def childNamePriority: Byte
    Definition Classes
    Area
  37. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native() @IntrinsicCandidate()
  38. def component: Component
    Definition Classes
    ContextUser
  39. def createGrp(name: String, addr: BigInt, maxSize: BigInt, doc: String, sec: Secure = null): RegSliceGrp
    Definition Classes
    BusIf
  40. def createRAM(name: String, addr: BigInt, size: BigInt, doc: String, sec: Secure = null, grp: GrpTag = null): RamInst
    Definition Classes
    BusIf
  41. def createRdFifo(name: String, addr: BigInt, Doc: String, sec: Secure = null, grp: GrpTag = null): RdFifoInst
    Definition Classes
    BusIf
  42. def createReg(name: String, addr: BigInt, doc: String, sec: Secure = null, grp: GrpTag = null): RegInst
    Definition Classes
    BusIf
  43. def createWrFifo(name: String, addr: BigInt, Doc: String, sec: Secure = null, grp: GrpTag = null): WrFifoInst
    Definition Classes
    BusIf
  44. def defaultReadBits: Bits
    Definition Classes
    BusIf
  45. val doRead: Bool
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  46. val doWrite: Bool
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  47. def docPath: String
    Definition Classes
    BusIf
  48. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  49. def equals(obj: Any): Boolean
    Definition Classes
    OverridedEqualsHashCode → AnyRef → Any
  50. def foreachReflectableNameables(doThat: (Any) ⇒ Unit): Unit
    Definition Classes
    Nameable
  51. def gen(doc: BusIfDoc): Unit
    Definition Classes
    BusIf
  52. def genBaseDocs(docname: String, prefix: String = ""): Unit
    Definition Classes
    BusIf
  53. def getAddrMap: List[String]
    Definition Classes
    BusIf
  54. final def getClass(): Class[_]
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @IntrinsicCandidate()
  55. def getCurrentBlockTag: ReuseTag
    Definition Classes
    BusIf
  56. def getDisplayName(): String
    Definition Classes
    Nameable
  57. def getInstanceCounter: Int
    Definition Classes
    ContextUser
  58. def getMode: Byte
    Attributes
    protected
    Definition Classes
    Nameable
  59. def getModuleName: String
    Definition Classes
    AxiLite4BusInterface → BusIf
  60. def getName(default: String): String
    Definition Classes
    NameableByComponent → Nameable
  61. def getName(): String
    Definition Classes
    NameableByComponent → Nameable
  62. def getOrCreateSecLogic(key: Bool, logic: Bool): Bool
    Definition Classes
    BusIf
  63. def getPartialName(): String
    Definition Classes
    Nameable
  64. def getPath(from: Component, to: Component): Seq[Component]
    Definition Classes
    NameableByComponent
  65. def getRefOwnersChain(): List[Any]
    Definition Classes
    OwnableRef
  66. def getRegPtr(): BigInt
    Definition Classes
    BusIf
  67. def getReservedAddressReadValue: BigInt
    Definition Classes
    BusIf
  68. def getScalaLocationLong: String
    Definition Classes
    ScalaLocated
  69. def getScalaLocationShort: String
    Definition Classes
    ScalaLocated
  70. def getScalaTrace(): Throwable
    Definition Classes
    ScalaLocated
  71. def getSecFailReadValue: BigInt
    Definition Classes
    BusIf
  72. def getVersion: String
    Definition Classes
    BusIfBase
  73. val globalData: GlobalData
    Definition Classes
    GlobalDataUser
  74. val grpId: Int
    Attributes
    protected
    Definition Classes
    BusIf
  75. def grpIdInc(): Unit
    Attributes
    protected
    Definition Classes
    BusIf
  76. def hasBlock: Boolean
    Definition Classes
    BusIf
  77. def hashCode(): Int
    Definition Classes
    OverridedEqualsHashCode → AnyRef → Any
  78. def initStrbMasks(): Unit
    Definition Classes
    BusIfBase
  79. def isCompletelyUnnamed: Boolean
    Definition Classes
    Nameable
  80. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  81. final def isNamed: Boolean
    Definition Classes
    Nameable
  82. def isPriorityApplicable(namePriority: Byte): Boolean
    Definition Classes
    Nameable
  83. def isUnnamed: Boolean
    Definition Classes
    NameableByComponent → Nameable
  84. def mwdata(pos: Int): Bool
    Definition Classes
    BusIfBase
  85. def mwdata(sec: Range): Bits
    Definition Classes
    BusIfBase
  86. val name: String
    Definition Classes
    Nameable
  87. val nameableRef: Nameable
    Attributes
    protected
    Definition Classes
    Nameable
    Annotations
    @DontName()
  88. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  89. def newBlockTag(instName: String)(partName: String): ReuseTag
    Definition Classes
    BusIf
  90. def newBlockTagAt(addr: BigInt, instName: String)(partName: String): ReuseTag
    Definition Classes
    BusIf
  91. def newGrp(maxSize: BigInt, doc: String, sec: Secure = null)(implicit symbol: SymbolName): RegSliceGrp
    Definition Classes
    BusIf
  92. def newGrpAt(address: BigInt, maxSize: BigInt, doc: String, sec: Secure = null)(implicit symbol: SymbolName): RegSliceGrp
    Definition Classes
    BusIf
  93. def newGrpTag(name: String): GrpTag
    Definition Classes
    BusIf
  94. def newRAM(size: BigInt, doc: String, sec: Secure = null, grp: GrpTag = null)(implicit symbol: SymbolName): RamInst
    Definition Classes
    BusIf
  95. def newRAMAt(address: BigInt, size: BigInt, doc: String, sec: Secure = null, grp: GrpTag = null)(implicit symbol: SymbolName): RamInst
    Definition Classes
    BusIf
  96. def newRdFifo(doc: String, sec: Secure = null, grp: GrpTag = null)(implicit symbol: SymbolName): RdFifoInst
    Definition Classes
    BusIf
  97. def newRdFifoAt(address: BigInt, doc: String, sec: Secure = null, grp: GrpTag = null)(implicit symbol: SymbolName): RdFifoInst
    Definition Classes
    BusIf
  98. def newReg(doc: String, sec: Secure = null, grp: GrpTag = null)(implicit symbol: SymbolName): RegInst
    Definition Classes
    BusIf
  99. def newRegAt(address: BigInt, doc: String, sec: Secure = null, grp: GrpTag = null)(implicit symbol: SymbolName): RegInst
    Definition Classes
    BusIf
  100. def newWrFifo(doc: String, sec: Secure = null, grp: GrpTag = null)(implicit symbol: SymbolName): WrFifoInst
    Definition Classes
    BusIf
  101. def newWrFifoAt(address: BigInt, doc: String, sec: Secure = null, grp: GrpTag = null)(implicit symbol: SymbolName): WrFifoInst
    Definition Classes
    BusIf
  102. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @IntrinsicCandidate()
  103. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @IntrinsicCandidate()
  104. def orderdRegInsts: ListBuffer[RegSlice]
    Definition Classes
    BusIf
  105. def overrideLocalName(name: String): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  106. val parentScope: ScopeStatement
    Definition Classes
    ContextUser
  107. def preCheck(): Unit
    Definition Classes
    BusIf
  108. def readAddress(): UInt
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  109. val readDefaultValue: BigInt
    Attributes
    protected
    Definition Classes
    BusIf
  110. def readHalt(): Unit
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  111. val readSync: Boolean
    Definition Classes
    BusIfBase
  112. val refOwner: RefOwnerType
    Definition Classes
    OwnableRef
    Annotations
    @DontName()
  113. def reflectNames(): Unit
    Definition Classes
    Nameable
  114. def regPart(name: String)(block: ⇒ Unit): Unit
    Definition Classes
    BusIf
  115. val regPre: String
    Definition Classes
    AxiLite4BusInterface → BusIf
  116. def regPtrReAnchorAt(pos: BigInt): Unit
    Definition Classes
    BusIf
  117. def regSlicesNotReuse: List[RegSlice]
    Definition Classes
    BusIf
  118. val reg_rdata: Bits
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  119. val reg_rderr: Bool
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  120. lazy val reg_wrerr: Bool
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  121. def repeatGroupsBase: Map[String, List[RegSlice]]
    Definition Classes
    BusIf
  122. def repeatGroupsHead: Map[String, List[RegSlice]]
    Definition Classes
    BusIf
  123. def resetBlockTag(): Unit
    Definition Classes
    BusIf
  124. def reuseGroups: Map[String, List[RegSlice]]
    Definition Classes
    BusIf
  125. def reuseGroupsById: Map[String, Map[Int, List[RegSlice]]]
    Definition Classes
    BusIf
  126. def rework[T](body: ⇒ T): T
    Definition Classes
    Area
  127. val scalaTrace: Throwable
    Definition Classes
    ScalaLocated
  128. def secFailDefaultBits: Bits
    Definition Classes
    BusIf
  129. val secFailReadValue: BigInt
    Attributes
    protected
    Definition Classes
    BusIf
  130. def setAlignCheck(value: Boolean = false): Unit
    Definition Classes
    BusIfBase
  131. def setCompositeName(nameable: Nameable, postfix: String, namePriority: Byte): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  132. def setCompositeName(nameable: Nameable, postfix: String, weak: Boolean): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  133. def setCompositeName(nameable: Nameable, postfix: String): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  134. def setCompositeName(nameable: Nameable, namePriority: Byte): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  135. def setCompositeName(nameable: Nameable, weak: Boolean): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  136. def setCompositeName(nameable: Nameable): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  137. def setLambdaName(isNameBody: ⇒ Boolean)(nameGen: ⇒ String): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  138. def setName(name: String, namePriority: Byte): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  139. def setName(name: String, weak: Boolean): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  140. def setName(name: String): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  141. def setNameAsWeak(): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  142. def setPartialName(name: String, namePriority: Byte, owner: Any): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  143. def setPartialName(name: String, namePriority: Byte): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  144. def setPartialName(name: String, weak: Boolean): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  145. def setPartialName(owner: Nameable, name: String, namePriority: Byte): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  146. def setPartialName(owner: Nameable, name: String, weak: Boolean): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  147. def setPartialName(name: String): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  148. def setPartialName(owner: Nameable, name: String): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  149. def setPartialName(owner: Nameable): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  150. def setRefOwner(that: Any): Unit
    Definition Classes
    OwnableRef
  151. def setReservedAddressReadValue(value: BigInt): Unit
    Definition Classes
    BusIf
  152. def setScalaLocated(source: ScalaLocated): AxiLite4BusInterface.this.type
    Definition Classes
    ScalaLocated
  153. def setSecFailReadValue(value: BigInt): Unit
    Definition Classes
    BusIf
  154. def setVersion(ver: String): Unit
    Definition Classes
    BusIfBase
  155. def setWeakName(name: String): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  156. val sizeMap: SizeMapping
  157. def slices: List[RegSlice]
    Definition Classes
    BusIf
  158. def strbWidth: Int
    Definition Classes
    BusIfBase
  159. final def synchronized[T0](arg0: ⇒ T0): T0
    Definition Classes
    AnyRef
  160. def toString(): String
    Definition Classes
    Area → Nameable → AnyRef → Any
  161. def underbitWidth: Int
    Definition Classes
    BusIfBase
  162. def unsetName(): AxiLite4BusInterface.this.type
    Definition Classes
    Nameable
  163. def valCallback[T](ref: T, name: String): T
    Definition Classes
    ValCallbackRec → ValCallback
  164. def valCallbackOn(ref: Any, name: String, refs: Set[Any]): Unit
    Definition Classes
    ValCallbackRec
  165. def valCallbackRec(obj: Any, name: String): Unit
    Definition Classes
    Area → ValCallbackRec
  166. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  167. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native()
  168. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  169. def wdata(reg: Bool, pos: Int, oper: String): Bool
    Definition Classes
    BusIfBase
  170. def wdata(reg: Bool, pos: Int): Bool
    Definition Classes
    BusIfBase
  171. def wdata(reg: BaseType, sec: Range, oper: String): Bits
    Definition Classes
    BusIfBase
  172. def wdata(reg: BaseType, sec: Range): Bits
    Definition Classes
    BusIfBase
  173. val withSecFireWall: Boolean
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  174. val withStrb: Boolean
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  175. val wmask: Bits
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  176. val wmaskn: Bits
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  177. def wordAddressInc: Int
    Definition Classes
    BusIfBase
  178. def writeAddress(): UInt
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  179. val writeData: Bits
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  180. def writeHalt(): Unit
    Definition Classes
    AxiLite4BusInterface → BusIfBase
  181. val wstrb: Bits
    Definition Classes
    AxiLite4BusInterface → BusIfBase

Deprecated Value Members

  1. def creatReg(name: String, addr: BigInt, doc: String, sec: Secure = null, grp: GrpTag = null): RegInst
    Definition Classes
    BusIf
    Annotations
    @deprecated
    Deprecated

    (Since version 2024.06.03) type error fix

  2. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] ) @Deprecated
    Deprecated
  3. lazy val readData: Bits
    Definition Classes
    BusIfBase
    Annotations
    @deprecated
    Deprecated

    (Since version 2024.12.30) readData rename to bus_rdata

  4. lazy val readError: Bool
    Definition Classes
    BusIfBase
    Annotations
    @deprecated
    Deprecated

    (Since version 2024.12.30) readError rename to bus_rderr

Inherited from Serializable

Inherited from Serializable

Inherited from Product

Inherited from Equals

Inherited from BusIf

Inherited from BusIfBase

Inherited from Area

Inherited from OverridedEqualsHashCode

Inherited from ValCallbackRec

Inherited from ValCallback

Inherited from NameableByComponent

Inherited from Nameable

Inherited from ContextUser

Inherited from ScalaLocated

Inherited from GlobalDataUser

Inherited from OwnableRef

Inherited from AnyRef

Inherited from Any

Ungrouped