class AsyncMemoryBusFactory extends BusSlaveFactoryDelayed
- Alphabetic
- By Inheritance
- AsyncMemoryBusFactory
- BusSlaveFactoryDelayed
- BusSlaveFactory
- Area
- OverridedEqualsHashCode
- ValCallbackRec
- ValCallback
- NameableByComponent
- Nameable
- ContextUser
- ScalaLocated
- GlobalDataUser
- OwnableRef
- AnyRef
- Any
- Hide All
- Show All
- Public
- All
Instance Constructors
- new AsyncMemoryBusFactory(bus: AsyncMemoryBus, incAddress: Int = 0)
Type Members
-
abstract
type
RefOwnerType
- Definition Classes
- OwnableRef
Value Members
-
final
def
!=(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
-
final
def
##(): Int
- Definition Classes
- AnyRef → Any
-
final
def
==(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
-
val
_config: BusSlaveFactoryConfig
Configuration of the BusSlaveFactory
Configuration of the BusSlaveFactory
- Attributes
- protected
- Definition Classes
- BusSlaveFactory
-
val
_context: Capture
- Definition Classes
- Area
-
final
def
asInstanceOf[T0]: T0
- Definition Classes
- Any
-
def
build(): Unit
In this function you have to define the read/write logic thanks to element, elementsPerAddress and elementsPerRangeAddress This is the only thing with def busDataWidth that should be implement by class that extends BusSlaveFactoryDelay
In this function you have to define the read/write logic thanks to element, elementsPerAddress and elementsPerRangeAddress This is the only thing with def busDataWidth that should be implement by class that extends BusSlaveFactoryDelay
- Definition Classes
- AsyncMemoryBusFactory → BusSlaveFactoryDelayed
-
def
busDataWidth: Int
Return the data width of the bus
Return the data width of the bus
- Definition Classes
- AsyncMemoryBusFactory → BusSlaveFactory
-
def
childNamePriority: Byte
- Definition Classes
- Area
-
def
clearOnSet[T <: Data](that: T, address: BigInt, bitOffset: Int = 0): T
- Definition Classes
- BusSlaveFactory
-
def
clone(): AnyRef
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws( ... ) @native() @IntrinsicCandidate()
-
def
component: Component
- Definition Classes
- ContextUser
-
def
createAndDriveFlow[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0, checkByteEnable: Boolean = false): Flow[T]
Create a writable Flow register of type dataType at address and placed at bitOffset in the word
Create a writable Flow register of type dataType at address and placed at bitOffset in the word
- checkByteEnable
do not trigger flow if byte enable is all zero. See https://github.com/SpinalHDL/SpinalHDL/issues/1265 for the discussion about this behaviour.
- Definition Classes
- BusSlaveFactory
-
def
createReadAndClearOnSet[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0): T
- Definition Classes
- BusSlaveFactory
-
def
createReadAndSetOnSet[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0): T
- Definition Classes
- BusSlaveFactory
-
def
createReadAndWrite[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T
Create a read write register of type dataType at address and placed at bitOffset in the word
Create a read write register of type dataType at address and placed at bitOffset in the word
- Definition Classes
- BusSlaveFactory
-
def
createReadMultiWord[T <: Data](that: T, address: BigInt, documentation: String = null): T
Create multi-words read register of type dataType
Create multi-words read register of type dataType
- Definition Classes
- BusSlaveFactory
-
def
createReadOnly[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T
Create a read only register of type dataType at address and placed at bitOffset in the word
Create a read only register of type dataType at address and placed at bitOffset in the word
- Definition Classes
- BusSlaveFactory
-
def
createWriteAndReadMultiWord[T <: Data](that: T, address: BigInt, documentation: String = null): T
Create multi-words write and read register of type dataType
Create multi-words write and read register of type dataType
- Definition Classes
- BusSlaveFactory
-
def
createWriteMultiWord[T <: Data](that: T, address: BigInt, documentation: String = null): T
Create multi-words write register of type dataType
Create multi-words write register of type dataType
- Definition Classes
- BusSlaveFactory
-
def
createWriteOnly[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T
Create a write only register of type dataType at address and placed at bitOffset in the word
Create a write only register of type dataType at address and placed at bitOffset in the word
- Definition Classes
- BusSlaveFactory
-
def
dataModelString(): String
- Definition Classes
- BusSlaveFactoryDelayed
-
def
doBitsAccumulationAndClearOnRead(that: Bits, address: BigInt, bitOffset: Int = 0): Unit
Instantiate an internal register which at each cycle do : reg := reg | that Then when a read occur, the register is cleared.
Instantiate an internal register which at each cycle do : reg := reg | that Then when a read occur, the register is cleared. This register is readable at address and placed at bitOffset in the word
- Definition Classes
- BusSlaveFactory
-
def
doMappedElements(jobs: Seq[BusSlaveFactoryElement], askWrite: Bool, askRead: Bool, doWrite: Bool, doRead: Bool, writeData: Bits, readData: Bits): Unit
- Definition Classes
- BusSlaveFactoryDelayed
-
def
doMappedReadElements(jobs: Seq[BusSlaveFactoryElement], askRead: Bool, doRead: Bool, readData: Bits): Unit
- Definition Classes
- BusSlaveFactoryDelayed
-
def
doMappedWriteElements(jobs: Seq[BusSlaveFactoryElement], askWrite: Bool, doWrite: Bool, writeData: Bits): Unit
- Definition Classes
- BusSlaveFactoryDelayed
-
def
doNonStopWrite(writeData: Bits): Unit
- Definition Classes
- BusSlaveFactoryDelayed
-
def
drive[T <: Data](address: BigInt, bitMapping: (Int, Data)*): Unit
- Definition Classes
- BusSlaveFactory
-
def
drive[T <: Data](that: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T
Drive that with a register writable at address placed at bitOffset in the word
Drive that with a register writable at address placed at bitOffset in the word
- Definition Classes
- BusSlaveFactory
-
def
driveAndRead[T <: Data](that: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T
Drive that with a register writable and readable at address placed at bitOffset in the word
Drive that with a register writable and readable at address placed at bitOffset in the word
- Definition Classes
- BusSlaveFactory
-
def
driveAndReadMultiWord[T <: Data](that: T, address: BigInt, documentation: String = null): T
Drive and read that on multi-word
Drive and read that on multi-word
- Definition Classes
- BusSlaveFactory
-
def
driveFlow[T <: Data](that: Flow[T], address: BigInt, bitOffset: Int = 0, checkByteEnable: Boolean = false): Unit
Emit on that a transaction when a write happen at address by using data placed at bitOffset in the word
Emit on that a transaction when a write happen at address by using data placed at bitOffset in the word
- checkByteEnable
do not trigger flow if byte enable is all zero. See https://github.com/SpinalHDL/SpinalHDL/issues/1265 for the discussion about this behaviour.
- Definition Classes
- BusSlaveFactory
-
def
driveMultiWord[T <: Data](that: T, address: BigInt, documentation: String = null): T
Drive that on multi-words
Drive that on multi-words
- Definition Classes
- BusSlaveFactory
-
def
driveStream[T <: Data](that: Stream[T], address: BigInt, bitOffset: Int = 0): Unit
Emit on that a transaction when a write happen at address, by using data placed at bitOffset in the word.
Emit on that a transaction when a write happen at address, by using data placed at bitOffset in the word. Block the write transaction until the transaction succeeds (stream becomes ready).
- Definition Classes
- BusSlaveFactory
-
val
elements: ArrayBuffer[BusSlaveFactoryElement]
Contains all elements created
Contains all elements created
- Definition Classes
- BusSlaveFactoryDelayed
-
val
elementsOk: HashSet[BusSlaveFactoryElement]
- Definition Classes
- BusSlaveFactoryDelayed
-
val
elementsPerAddress: LinkedHashMap[AddressMapping, ArrayBuffer[BusSlaveFactoryElement]]
Contains all elements related to an address
Contains all elements related to an address
- Definition Classes
- BusSlaveFactoryDelayed
-
final
def
eq(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
-
def
equals(obj: Any): Boolean
- Definition Classes
- OverridedEqualsHashCode → AnyRef → Any
-
def
foreachReflectableNameables(doThat: (Any) ⇒ Unit): Unit
- Definition Classes
- Nameable
-
final
def
getClass(): Class[_]
- Definition Classes
- AnyRef → Any
- Annotations
- @native() @IntrinsicCandidate()
-
def
getConfig: BusSlaveFactoryConfig
- Definition Classes
- BusSlaveFactory
-
def
getDisplayName(): String
- Definition Classes
- Nameable
-
def
getInstanceCounter: Int
- Definition Classes
- ContextUser
-
def
getMode: Byte
- Attributes
- protected
- Definition Classes
- Nameable
-
def
getName(default: String): String
- Definition Classes
- NameableByComponent → Nameable
-
def
getName(): String
- Definition Classes
- NameableByComponent → Nameable
-
def
getPartialName(): String
- Definition Classes
- Nameable
-
def
getPath(from: Component, to: Component): Seq[Component]
- Definition Classes
- NameableByComponent
-
def
getRefOwnersChain(): List[Any]
- Definition Classes
- OwnableRef
-
def
getScalaLocationLong: String
- Definition Classes
- ScalaLocated
-
def
getScalaLocationShort: String
- Definition Classes
- ScalaLocated
-
def
getScalaTrace(): Throwable
- Definition Classes
- ScalaLocated
-
val
globalData: GlobalData
- Definition Classes
- GlobalDataUser
-
def
hashCode(): Int
- Definition Classes
- OverridedEqualsHashCode → AnyRef → Any
-
def
isCompletelyUnnamed: Boolean
- Definition Classes
- Nameable
-
final
def
isInstanceOf[T0]: Boolean
- Definition Classes
- Any
-
final
def
isNamed: Boolean
- Definition Classes
- Nameable
-
def
isPriorityApplicable(namePriority: Byte): Boolean
- Definition Classes
- Nameable
-
def
isReading(address: BigInt): Bool
Return true if the bus is reading
Return true if the bus is reading
- Definition Classes
- BusSlaveFactory
-
def
isUnnamed: Boolean
- Definition Classes
- NameableByComponent → Nameable
-
def
isWriting(address: BigInt): Bool
Return true if the bus is writing
Return true if the bus is writing
- Definition Classes
- BusSlaveFactory
-
def
multiCycleRead(address: AddressMapping, cycles: BigInt): Unit
- Definition Classes
- BusSlaveFactory
-
val
name: String
- Definition Classes
- Nameable
- val nameableRef: Nameable
-
final
def
ne(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
-
def
nonStopWrite[T <: Data](that: T, bitOffset: Int = 0, documentation: String = null): T
Permanently assign that by the bus write data from bitOffset
Permanently assign that by the bus write data from bitOffset
- Definition Classes
- BusSlaveFactoryDelayed → BusSlaveFactory
-
final
def
notify(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native() @IntrinsicCandidate()
-
final
def
notifyAll(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native() @IntrinsicCandidate()
-
def
onRead(address: BigInt, documentation: String = null)(doThat: ⇒ Unit): Unit
Call doThat when a read transaction occurs on address
Call doThat when a read transaction occurs on address
- Definition Classes
- BusSlaveFactory
-
def
onReadPrimitive(address: AddressMapping, haltSensitive: Boolean, documentation: String)(doThat: ⇒ Unit): Unit
- Definition Classes
- BusSlaveFactoryDelayed → BusSlaveFactory
-
def
onWrite(address: BigInt, documentation: String = null)(doThat: ⇒ Unit): Unit
Call doThat when a write transaction occurs on address
Call doThat when a write transaction occurs on address
- Definition Classes
- BusSlaveFactory
-
def
onWritePrimitive(address: AddressMapping, haltSensitive: Boolean, documentation: String)(doThat: ⇒ Unit): Unit
- Definition Classes
- BusSlaveFactoryDelayed → BusSlaveFactory
-
def
overrideLocalName(name: String): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
val
parentScope: ScopeStatement
- Definition Classes
- ContextUser
-
def
printDataModel(): Unit
- Definition Classes
- BusSlaveFactoryDelayed
-
def
read[T <: Data](address: BigInt, bitMapping: (Int, Data)*): Unit
- Definition Classes
- BusSlaveFactory
-
def
read[T <: Data](that: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T
When the bus read the address, fill the response with that at bitOffset
When the bus read the address, fill the response with that at bitOffset
- Definition Classes
- BusSlaveFactory
-
def
readAddress(): UInt
- Definition Classes
- AsyncMemoryBusFactory → BusSlaveFactory
-
def
readAddress(address: AddressMapping): UInt
- Definition Classes
- BusSlaveFactory
-
def
readAndClearOnSet[T <: Data](that: T, address: BigInt, bitOffset: Int = 0): T
- Definition Classes
- BusSlaveFactory
-
def
readAndSetOnSet[T <: Data](that: T, address: BigInt, bitOffset: Int = 0): T
- Definition Classes
- BusSlaveFactory
-
def
readAndWrite(that: Data, address: BigInt, bitOffset: Int = 0, documentation: String = null): Unit
Make that readable and writable at address and placed at bitOffset in the word
Make that readable and writable at address and placed at bitOffset in the word
- Definition Classes
- BusSlaveFactory
-
def
readAndWriteMultiWord(that: Data, address: BigInt, documentation: String = null): Unit
Create the memory mapping to write/read that from address
Create the memory mapping to write/read that from address
- Definition Classes
- BusSlaveFactory
-
def
readError(): Unit
- Definition Classes
- BusSlaveFactory
-
val
readErrorFlag: Bool
- Definition Classes
- BusSlaveFactory
-
def
readFire(): Bool
- Definition Classes
- BusSlaveFactory
-
def
readHalt(): Unit
- Definition Classes
- AsyncMemoryBusFactory → BusSlaveFactory
-
def
readMultiWord(that: Data, address: BigInt, documentation: String = null): Unit
Create the memory mapping to read
that
fromaddress
Ifthat
is bigger than one word it extends the register on following addresses.Create the memory mapping to read
that
fromaddress
Ifthat
is bigger than one word it extends the register on following addresses.- Definition Classes
- BusSlaveFactory
-
def
readPrimitive[T <: Data](that: T, address: AddressMapping, bitOffset: Int, documentation: String): Unit
- Definition Classes
- BusSlaveFactoryDelayed → BusSlaveFactory
-
def
readStreamBlockCycles[T <: Data](that: Stream[T], address: BigInt, blockCycles: UInt, timeout: Bool = null): Unit
Same as
readStreamNonBlocking
, but block the bus for at mostblockCycles
before returning the NACK.Same as
readStreamNonBlocking
, but block the bus for at mostblockCycles
before returning the NACK.- T
type of stream payload
- that
data to read over bus
- address
address to map at
- blockCycles
cycles to block read transaction before returning NACK
- timeout
whether the read transaction timed out (returned NACK)
- Definition Classes
- BusSlaveFactory
-
def
readStreamNonBlocking[T <: Data](that: Stream[T], address: BigInt, validBitOffset: Int, payloadBitOffset: Int, validInverted: Boolean = false): Unit
Read that and consume the transaction when a read happen at address.
Read that and consume the transaction when a read happen at address.
- Definition Classes
- BusSlaveFactory
-
def
readStreamNonBlocking[T <: Data](that: Stream[T], address: BigInt): Unit
Read that (that is bigger than the busWidth) and consume the transaction when a read happen at address.
Read that (that is bigger than the busWidth) and consume the transaction when a read happen at address.
- Definition Classes
- BusSlaveFactory
- Note
in order to avoid to read wrong data read first the address which contains the valid signal. Little : payload - valid at address 0x00 Big : valid - payload at address 0x00 Once the valid signal is true you can read all registers
-
def
readSyncMemMultiWord[T <: Data](mem: Mem[T], addressOffset: BigInt, memOffset: UInt = U(0).resized): Mem[T]
Memory map a Mem to bus for reading.
Memory map a Mem to bus for reading. Elements can be larger than bus data width in bits.
- Definition Classes
- BusSlaveFactory
-
def
readSyncMemWordAligned[T <: Data](mem: Mem[T], addressOffset: BigInt, bitOffset: Int = 0, memOffset: UInt = U(0).resized): Mem[T]
- Definition Classes
- BusSlaveFactory
-
val
refOwner: RefOwnerType
- Definition Classes
- OwnableRef
- Annotations
- @DontName()
-
def
reflectNames(): Unit
- Definition Classes
- Nameable
-
def
rework[T](body: ⇒ T): T
- Definition Classes
- Area
-
val
scalaTrace: Throwable
- Definition Classes
- ScalaLocated
-
def
setCompositeName(nameable: Nameable, postfix: String, namePriority: Byte): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setCompositeName(nameable: Nameable, postfix: String, weak: Boolean): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setCompositeName(nameable: Nameable, postfix: String): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setCompositeName(nameable: Nameable, namePriority: Byte): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setCompositeName(nameable: Nameable, weak: Boolean): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setCompositeName(nameable: Nameable): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setConfig(value: BusSlaveFactoryConfig): AsyncMemoryBusFactory.this.type
- Definition Classes
- BusSlaveFactory
-
def
setLambdaName(isNameBody: ⇒ Boolean)(nameGen: ⇒ String): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setName(name: String, namePriority: Byte): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setName(name: String, weak: Boolean): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setName(name: String): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setNameAsWeak(): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setOnClear[T <: Data](that: T, address: BigInt, bitOffset: Int = 0): T
- Definition Classes
- BusSlaveFactory
-
def
setOnSet[T <: Data](that: T, address: BigInt, bitOffset: Int = 0): T
- Definition Classes
- BusSlaveFactory
-
def
setPartialName(name: String, namePriority: Byte, owner: Any): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setPartialName(name: String, namePriority: Byte): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setPartialName(name: String, weak: Boolean): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setPartialName(owner: Nameable, name: String, namePriority: Byte): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setPartialName(owner: Nameable, name: String, weak: Boolean): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setPartialName(name: String): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setPartialName(owner: Nameable, name: String): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setPartialName(owner: Nameable): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setRefOwner(that: Any): Unit
- Definition Classes
- OwnableRef
-
def
setScalaLocated(source: ScalaLocated): AsyncMemoryBusFactory.this.type
- Definition Classes
- ScalaLocated
-
def
setWeakName(name: String): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
setWordEndianness(value: Endianness): BusSlaveFactory
Set the endianness during write/read multiword
Set the endianness during write/read multiword
- Definition Classes
- BusSlaveFactory
-
final
def
synchronized[T0](arg0: ⇒ T0): T0
- Definition Classes
- AnyRef
- def toString(): String
-
def
unsetName(): AsyncMemoryBusFactory.this.type
- Definition Classes
- Nameable
-
def
valCallback[T](ref: T, name: String): T
- Definition Classes
- ValCallbackRec → ValCallback
-
def
valCallbackOn(ref: Any, name: String, refs: Set[Any]): Unit
- Definition Classes
- ValCallbackRec
-
def
valCallbackRec(obj: Any, name: String): Unit
- Definition Classes
- Area → ValCallbackRec
-
final
def
wait(arg0: Long, arg1: Int): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws( ... )
-
final
def
wait(arg0: Long): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws( ... ) @native()
-
final
def
wait(): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws( ... )
-
def
withOffset(offset: BigInt): BusSlaveFactoryAddressWrapper
- Definition Classes
- BusSlaveFactory
-
def
wordAddressInc: Int
Address incrementation used by the read and write multi words registers
Address incrementation used by the read and write multi words registers
- Definition Classes
- AsyncMemoryBusFactory → BusSlaveFactory
-
def
write[T <: Data](address: BigInt, bitMapping: (Int, Data)*): Unit
- Definition Classes
- BusSlaveFactory
-
def
write[T <: Data](that: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T
When the bus write the address, assign that with bus’s data from bitOffset
When the bus write the address, assign that with bus’s data from bitOffset
- Definition Classes
- BusSlaveFactory
-
def
writeAddress(): UInt
- Definition Classes
- AsyncMemoryBusFactory → BusSlaveFactory
-
def
writeAddress(address: AddressMapping): UInt
- Definition Classes
- BusSlaveFactory
-
def
writeByteEnable(): Bits
Byte enable bits, defaulting to all ones
Byte enable bits, defaulting to all ones
- Definition Classes
- BusSlaveFactory
-
def
writeError(): Unit
- Definition Classes
- BusSlaveFactory
-
val
writeErrorFlag: Bool
- Definition Classes
- BusSlaveFactory
-
def
writeFire(): Bool
- Definition Classes
- BusSlaveFactory
-
def
writeHalt(): Unit
- Definition Classes
- AsyncMemoryBusFactory → BusSlaveFactory
-
def
writeMemMultiWord[T <: Data](mem: Mem[T], addressOffset: BigInt): Mem[T]
Memory map a Mem to bus for writing.
Memory map a Mem to bus for writing. Elements can be larger than bus data width in bits.
- Definition Classes
- BusSlaveFactory
-
def
writeMemWordAligned[T <: Data](mem: Mem[T], addressOffset: BigInt, bitOffset: Int = 0, memOffset: UInt = U(0).resized): Mem[T]
- Definition Classes
- BusSlaveFactory
-
def
writeMultiWord(that: Data, address: BigInt, documentation: String = null): Unit
Create the memory mapping to write that at address.
Create the memory mapping to write that at address. If
that
is bigger than one word it extends the register on following addresses.- Definition Classes
- BusSlaveFactory
-
def
writePrimitive[T <: Data](that: T, address: AddressMapping, bitOffset: Int, documentation: String): Unit
- Definition Classes
- BusSlaveFactoryDelayed → BusSlaveFactory
Deprecated Value Members
-
def
createReadWrite[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0): T
- Definition Classes
- BusSlaveFactory
- Annotations
- @deprecated
- Deprecated
(Since version ???) Use createReadAndWrite instead
-
def
finalize(): Unit
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws( classOf[java.lang.Throwable] ) @Deprecated
- Deprecated